74xx_7xx: CPCI750: Add CPCI adapter/target support
The CPCI750 can be built as CPCI host or adapter/target board. This patch adds support for runtime detection of those variants. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
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@ -140,6 +140,15 @@ void board_prebootm_init (void);
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unsigned int INTERNAL_REG_BASE_ADDR = CONFIG_SYS_GT_REGS;
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int display_mem_map (void);
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/*
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* Skip video initialization on slave variant.
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* This function will overwrite the weak default in cfb_console.c
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*/
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int board_video_skip(void)
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{
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return CPCI750_SLAVE_TEST;
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}
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/* ------------------------------------------------------------------------- */
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/*
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@ -39,6 +39,8 @@ int ide_preinit (void)
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int l;
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status = 1;
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if (CPCI750_SLAVE_TEST != 0)
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return status;
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for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) {
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ide_bus_offset[l] = -ATA_STATUS;
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}
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@ -57,7 +59,7 @@ int ide_preinit (void)
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ide_bus_offset[1] &= 0xfffffffe;
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ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE;
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}
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return (status);
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return status;
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}
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void ide_set_reset (int flag) {
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@ -795,7 +795,6 @@ static int gt_write_config_dword (struct pci_controller *hose,
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PCI_DEV (dev), bus,
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value);
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}
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return 0;
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}
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@ -807,6 +806,9 @@ static void gt_setup_ide (struct pci_controller *hose,
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u32 bar_response, bar_value;
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int bar;
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if (CPCI750_SLAVE_TEST != 0)
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return;
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for (bar = 0; bar < 6; bar++) {
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/*ronen different function for 3rd bank. */
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unsigned int offset =
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@ -833,6 +835,9 @@ static void gt_setup_cpcidvi (struct pci_controller *hose,
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{
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u32 bar_value, pci_response;
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if (CPCI750_SLAVE_TEST != 0)
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return;
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pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &pci_response);
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pci_hose_write_config_dword (hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff);
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pci_hose_read_config_dword (hose, dev, PCI_BASE_ADDRESS_0, &pci_response);
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@ -911,6 +916,7 @@ struct pci_controller pci1_hose = {
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void pci_init_board (void)
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{
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unsigned int command;
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unsigned int slave;
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#ifdef CONFIG_PCI_PNP
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unsigned int bar;
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#endif
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@ -922,6 +928,8 @@ void pci_init_board (void)
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gt_cpcidvi_rom.base = 0;
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#endif
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slave = CPCI750_SLAVE_TEST;
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pci0_hose.config_table = gt_config_table;
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pci1_hose.config_table = gt_config_table;
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@ -957,27 +965,40 @@ void pci_init_board (void)
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pci0_hose.cfg_addr = (unsigned int *) PCI_HOST0;
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pci_register_hose (&pci0_hose);
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pciArbiterEnable (PCI_HOST0);
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pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
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command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
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command |= PCI_COMMAND_MASTER;
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pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
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command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
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command |= PCI_COMMAND_MEMORY;
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pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
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if (slave == 0) {
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pciArbiterEnable (PCI_HOST0);
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pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
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command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
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command |= PCI_COMMAND_MASTER;
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pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
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command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
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command |= PCI_COMMAND_MEMORY;
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pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
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#ifdef CONFIG_PCI_PNP
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pciauto_config_init(&pci0_hose);
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pciauto_region_allocate(pci0_hose.pci_io, 0x400, &bar);
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pciauto_config_init(&pci0_hose);
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pciauto_region_allocate(pci0_hose.pci_io, 0x400, &bar);
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#endif
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#ifdef CONFIG_PCI_SCAN_SHOW
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printf("PCI: Bus Dev VenId DevId Class Int\n");
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printf("PCI: Bus Dev VenId DevId Class Int\n");
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#endif
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pci0_hose.last_busno = pci_hose_scan_bus (&pci0_hose, pci0_hose.first_busno);
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pci0_hose.last_busno = pci_hose_scan_bus (&pci0_hose,
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pci0_hose.first_busno);
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#ifdef DEBUG
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gt_pci_bus_mode_display (PCI_HOST1);
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gt_pci_bus_mode_display (PCI_HOST1);
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#endif
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} else {
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pciArbiterDisable (PCI_HOST0);
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pciParkingDisable (PCI_HOST0, 1, 1, 1, 1, 1, 1, 1);
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command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
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command |= PCI_COMMAND_MASTER;
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pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
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command = pciReadConfigReg (PCI_HOST0, PCI_COMMAND, SELF);
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command |= PCI_COMMAND_MEMORY;
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pciWriteConfigReg (PCI_HOST0, PCI_COMMAND, SELF, command);
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pci0_hose.last_busno = pci0_hose.first_busno;
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}
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pci1_hose.first_busno = pci0_hose.last_busno + 1;
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pci1_hose.last_busno = 0xff;
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pci1_hose.current_busno = pci1_hose.first_busno;
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@ -627,4 +627,6 @@
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#define CONFIG_SYS_BOARD_ASM_INIT 1
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#define CPCI750_SLAVE_TEST (((in8(0xf0300000) & 0x80) == 0) ? 0 : 1)
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#endif /* __CONFIG_H */
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