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MIMC200: reduce LCD pixclock 

The initial pixclock for the MIMC200 board is wrong (and causes
screen corruption due to DMA underruns).

This patch simply reduces the pixel clock to fix the problem.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
This commit is contained in:
Mark Jackson 2009-08-11 11:33:47 +01:00 committed by Anatolij Gustschin
parent eb1a4d0a47
commit 54e399f110
1 changed files with 1 additions and 1 deletions
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2
board/mimc/mimc200/mimc200.c
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@ -38,7 +38,7 @@
vidinfo_t panel_info = { vidinfo_t panel_info = {
.vl_col = 480, /* Number of columns */ .vl_col = 480, /* Number of columns */
.vl_row = 272, /* Number of rows */ .vl_row = 272, /* Number of rows */
.vl_clk = 10000000, /* pixel clock in ps */ .vl_clk = 5000000, /* pixel clock in ps */
.vl_sync = ATMEL_LCDC_INVCLK_INVERTED | .vl_sync = ATMEL_LCDC_INVCLK_INVERTED |
ATMEL_LCDC_INVLINE_INVERTED | ATMEL_LCDC_INVLINE_INVERTED |
ATMEL_LCDC_INVFRAME_INVERTED, ATMEL_LCDC_INVFRAME_INVERTED,