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spl, nand, atmel_nand: add erase one block function 

erase one nand block in spl code. keep it simple, as size matters
This is used on the upcoming taurus spl support.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This commit is contained in:
Heiko Schocher 2014-10-31 08:31:02 +01:00 committed by Tom Rini
parent c1ec406282
commit 4dfd360589
2 changed files with 34 additions and 0 deletions
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33
drivers/mtd/nand/atmel_nand.c
View File

@ -1274,6 +1274,39 @@ static int nand_read_page(int block, int page, void *dst)
return 0;
}
int spl_nand_erase_one(int block, int page)
{
struct nand_chip *this = mtd.priv;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
int page_addr;
if (nand_chip.select_chip)
nand_chip.select_chip(&mtd, 0);
page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
hwctrl(&mtd, NAND_CMD_ERASE1, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Row address */
hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE | NAND_CTRL_CHANGE);
hwctrl(&mtd, ((page_addr >> 8) & 0xff),
NAND_CTRL_ALE | NAND_CTRL_CHANGE);
#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
/* One more address cycle for devices > 128MiB */
hwctrl(&mtd, (page_addr >> 16) & 0x0f,
NAND_CTRL_ALE | NAND_CTRL_CHANGE);
#endif
hwctrl(&mtd, NAND_CMD_ERASE2, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
udelay(2000);
while (!this->dev_ready(&mtd))
;
nand_deselect();
return 0;
}
#else
static int nand_read_page(int block, int page, void *dst)
{

1
include/nand.h
View File

@ -167,3 +167,4 @@ __attribute__((noreturn)) void nand_boot(void);
#define ENV_OFFSET_SIZE 8
int get_nand_env_oob(nand_info_t *nand, unsigned long *result);
#endif
int spl_nand_erase_one(int block, int page);