ARM: mx5: Enable L2 cache
Enable L2 cache for improving the system performance. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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@ -45,6 +45,12 @@
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#endif
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mcr 15, 1, r0, c9, c0, 2
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/* enable L2 cache */
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mrc 15, 0, r0, c1, c0, 1
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orr r0, r0, #2
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mcr 15, 0, r0, c1, c0, 1
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.endm /* init_l2cc */
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/* AIPS setup - Only setup MPROTx registers.
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