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armv8: ls2080aqds: Config QSPI pin mux via FPGA in NAND boot 

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Yuan Yao 2016-06-08 18:24:57 +08:00 committed by York Sun
parent 95ab851de0
commit 453418f2d2
3 changed files with 17 additions and 0 deletions
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2
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
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@ -129,6 +129,8 @@
#define DCFG_PORSR1_RCW_SRC_NOR 0x12f00000
#define DCFG_RCWSR13 0x130
#define DCFG_RCWSR13_DSPI (0 << 8)
#define DCFG_RCWSR15 0x138
#define DCFG_RCWSR15_IFCGRPABASE_QSPI 0x3
#define DCFG_DCSR_BASE 0X700100000ULL
#define DCFG_DCSR_PORCR1 0x000

9
board/freescale/ls2080aqds/ls2080aqds.c
View File

@ -208,6 +208,15 @@ int board_init(void)
else
config_board_mux(MUX_TYPE_SDHC);
#if defined(CONFIG_NAND) && defined(CONFIG_FSL_QSPI)
val = in_le32(dcfg_ccsr + DCFG_RCWSR15 / 4);
if (DCFG_RCWSR15_IFCGRPABASE_QSPI == (val & (u32)0x3))
QIXIS_WRITE(brdcfg[9],
(QIXIS_READ(brdcfg[9]) & 0xf8) |
FSL_QIXIS_BRDCFG9_QSPI);
#endif
#ifdef CONFIG_ENV_IS_NOWHERE
gd->env_addr = (ulong)&default_environment[0];
#endif

6
include/configs/ls2080aqds.h
View File

@ -303,6 +303,12 @@ unsigned long get_board_ddr_clk(void);
#define FSL_QSPI_FLASH_SIZE (1 << 26) /* 64MB */
#define FSL_QSPI_FLASH_NUM 4
#endif
/*
* Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
* If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0
* If boot from IFCCard NAND, ISO1 = 0, ISO2 = 0, IBOOT = 1
*/
#define FSL_QIXIS_BRDCFG9_QSPI 0x1
#endif