Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx
This commit is contained in:
Wolfgang Denk
commit
3709898b3a
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@ -19,21 +19,18 @@
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#define DEBUG
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#include <common.h>
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#include <command.h>
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/immap_86xx.h>
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#include <asm/immap_fsl_pci.h>
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#include <i2c.h>
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#include <spd.h>
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#include <asm/io.h>
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#if defined(CONFIG_OF_FLAT_TREE)
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#include <ft_build.h>
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extern void ft_cpu_setup(void *blob, bd_t *bd);
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#endif
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#include <libfdt.h>
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#include <fdt_support.h>
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#include "../common/pixis.h"
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@ -47,6 +44,8 @@ extern void ddr_enable_ecc(unsigned int dram_size);
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void sdram_init(void);
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long int fixed_sdram(void);
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void mpc8610hpcd_diu_init(void);
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/* called before any console output */
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int board_early_init_f(void)
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@ -456,46 +455,57 @@ void pci_init_board(void)
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#endif /* CONFIG_PCI1 */
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}
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#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
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#if defined(CONFIG_OF_BOARD_SETUP)
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void
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ft_board_setup(void *blob, bd_t *bd)
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{
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u32 *p;
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int len;
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int node, tmp[2];
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const char *path;
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ft_cpu_setup(blob, bd);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"timebase-frequency", bd->bi_busfreq / 4, 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"bus-frequency", bd->bi_busfreq, 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"clock-frequency", bd->bi_intfreq, 1);
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do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
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"bus-frequency", bd->bi_busfreq, 1);
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p = ft_get_prop(blob, "/memory/reg", &len);
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if (p != NULL) {
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*p++ = cpu_to_be32(bd->bi_memstart);
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*p = cpu_to_be32(bd->bi_memsize);
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}
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do_fixup_by_compat_u32(blob, "ns16550",
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"clock-frequency", bd->bi_busfreq, 1);
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fdt_fixup_memory(blob, bd->bi_memstart, bd->bi_memsize);
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node = fdt_path_offset(blob, "/aliases");
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tmp[0] = 0;
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if (node >= 0) {
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#ifdef CONFIG_PCI1
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p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8000/bus-range", &len);
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if (p != NULL) {
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p[0] = 0;
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p[1] = pci1_hose.last_busno - pci1_hose.first_busno;
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debug("pci@8000 first_busno=%d last_busno=%d\n",p[0],p[1]);
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}
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path = fdt_getprop(blob, node, "pci0", NULL);
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if (path) {
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tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno;
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do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
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}
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#endif
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#ifdef CONFIG_PCIE1
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p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@a000/bus-range", &len);
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if (p != NULL) {
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p[0] = 0;
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p[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
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debug("pcie@9000 first_busno=%d last_busno=%d\n",p[0],p[1]);
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path = fdt_getprop(blob, node, "pci1", NULL);
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if (path) {
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tmp[1] = pcie1_hose.last_busno
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- pcie1_hose.first_busno;
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do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
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}
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#endif
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#ifdef CONFIG_PCIE2
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p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@9000/bus-range", &len);
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if (p != NULL) {
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p[0] = 0;
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p[1] = pcie2_hose.last_busno - pcie2_hose.first_busno;
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debug("pcie@9000 first_busno=%d last_busno=%d\n",p[0],p[1]);
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}
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path = fdt_getprop(blob, node, "pci2", NULL);
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if (path) {
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tmp[1] = pcie2_hose.last_busno
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- pcie2_hose.first_busno;
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do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
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}
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#endif
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}
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}
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#endif
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@ -196,7 +196,7 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
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spd_eeprom_t spd;
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unsigned int n_ranks;
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unsigned int rank_density;
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unsigned int odt_rd_cfg, odt_wr_cfg;
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unsigned int odt_rd_cfg, odt_wr_cfg, ba_bits;
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unsigned int odt_cfg, mode_odt_enable;
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unsigned int refresh_clk;
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#ifdef MPC86xx_DDR_SDRAM_CLK_CNTL
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@ -321,6 +321,10 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
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odt_wr_cfg = 1; /* Assert ODT on writes to CS0 */
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}
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ba_bits = 0;
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if (spd.nbanks == 0x8)
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ba_bits = 1;
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#ifdef CONFIG_DDR_INTERLEAVE
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if (dimm_num != 1) {
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@ -357,6 +361,7 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
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#endif
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| (odt_rd_cfg << 20)
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| (odt_wr_cfg << 16)
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| (ba_bits << 14)
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| (spd.nrow_addr - 12) << 8
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| (spd.ncol_addr - 8) );
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@ -386,6 +391,7 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
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ddr->cs0_config = ( 1 << 31
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| (odt_rd_cfg << 20)
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| (odt_wr_cfg << 16)
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| (ba_bits << 14)
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| (spd.nrow_addr - 12) << 8
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| (spd.ncol_addr - 8) );
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@ -403,6 +409,7 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
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ddr->cs1_config = ( 1<<31
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| (odt_rd_cfg << 20)
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| (odt_wr_cfg << 16)
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| (ba_bits << 14)
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| (spd.nrow_addr - 12) << 8
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| (spd.ncol_addr - 8) );
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debug("DDR: cs1_bnds = 0x%08x\n", ddr->cs1_bnds);
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@ -422,6 +429,7 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
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ddr->cs2_config = ( 1 << 31
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| (odt_rd_cfg << 20)
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| (odt_wr_cfg << 16)
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| (ba_bits << 14)
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| (spd.nrow_addr - 12) << 8
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| (spd.ncol_addr - 8) );
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@ -439,6 +447,7 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num,
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ddr->cs3_config = ( 1<<31
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| (odt_rd_cfg << 20)
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| (odt_wr_cfg << 16)
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| (ba_bits << 14)
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| (spd.nrow_addr - 12) << 8
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| (spd.ncol_addr - 8) );
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debug("DDR: cs3_bnds = 0x%08x\n", ddr->cs3_bnds);
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@ -245,17 +245,14 @@
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/*
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* Pass open firmware flat tree to kernel
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*/
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#define CONFIG_OF_FLAT_TREE 1
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#define CONFIG_OF_BOARD_SETUP 1
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#define CONFIG_OF_LIBFDT 1
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#define CONFIG_OF_BOARD_SETUP 1
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#define CONFIG_OF_STDOUT_VIA_ALIAS 1
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/* maximum size of the flat tree (8K) */
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#define OF_FLAT_TREE_MAX_SIZE 8192
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#define OF_CPU "PowerPC,8610@0"
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#define OF_SOC "soc@e0000000"
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#define OF_TBCLK (bd->bi_busfreq / 4)
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#define OF_STDOUT_PATH "/soc@e0000000/serial@4500"
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#define CFG_64BIT_VSPRINTF 1
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#define CFG_64BIT_STRTOUL 1
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@ -517,13 +514,6 @@
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*/
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
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/* Cache Configuration */
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#define CFG_DCACHE_SIZE 32768
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#define CFG_CACHELINE_SIZE 32
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
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#endif
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/*
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* Internal Definitions
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*
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@ -618,8 +608,8 @@
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"consoledev=ttyS0\0" \
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"ramdiskaddr=2000000\0" \
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"ramdiskfile=8610hpcd/ramdisk.uboot\0" \
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"dtbaddr=c00000\0" \
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"dtbfile=8610hpcd/mpc8610_hpcd.dtb\0" \
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"fdtaddr=c00000\0" \
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"fdtfile=8610hpcd/mpc8610_hpcd.dtb\0" \
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"bdev=sda3\0" \
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"en-wd=mw.b f8100010 0x08; echo -expect:- 08; md.b f8100010 1\0" \
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"dis-wd=mw.b f8100010 0x00; echo -expect:- 00; md.b f8100010 1\0" \
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@ -658,8 +648,8 @@
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"consoledev=ttyS0\0" \
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"ramdiskaddr=2000000\0" \
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"ramdiskfile=8610hpcd/ramdisk.uboot\0" \
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"dtbaddr=c00000\0" \
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"dtbfile=8610hpcd/mpc8610_hpcd.dtb\0" \
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"fdtaddr=c00000\0" \
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"fdtfile=8610hpcd/mpc8610_hpcd.dtb\0" \
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"bdev=sda3\0" \
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"othbootargs=diufb=15M video=fslfb:1280x1024-32@60,monitor=0\0"\
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"monitor=0-DVI\0"
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@ -671,22 +661,22 @@
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"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
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"console=$consoledev,$baudrate $othbootargs;" \
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"tftp $loadaddr $bootfile;" \
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"tftp $dtbaddr $dtbfile;" \
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"bootm $loadaddr - $dtbaddr"
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"tftp $fdtaddr $fdtfile;" \
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"bootm $loadaddr - $fdtaddr"
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#define CONFIG_RAMBOOTCOMMAND \
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"setenv bootargs root=/dev/ram rw " \
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"console=$consoledev,$baudrate $othbootargs;" \
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"tftp $ramdiskaddr $ramdiskfile;" \
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"tftp $loadaddr $bootfile;" \
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"tftp $dtbaddr $dtbfile;" \
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"bootm $loadaddr $ramdiskaddr $dtbaddr"
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"tftp $fdtaddr $fdtfile;" \
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"bootm $loadaddr $ramdiskaddr $fdtaddr"
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#define CONFIG_BOOTCOMMAND \
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"setenv bootargs root=/dev/$bdev rw " \
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"console=$consoledev,$baudrate $othbootargs;" \
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"tftp $loadaddr $bootfile;" \
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"tftp $dtbaddr $dtbfile;" \
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"bootm $loadaddr - $dtbaddr"
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"tftp $fdtaddr $fdtfile;" \
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"bootm $loadaddr - $fdtaddr"
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#endif /* __CONFIG_H */
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