clk: uniphier: constify clock data arrays/structures
Clarify these clock data are constant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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c72f4d4c2e
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3524d47c79
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@ -17,7 +17,7 @@
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static int uniphier_clk_enable(struct clk *clk)
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static int uniphier_clk_enable(struct clk *clk)
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{
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{
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struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
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struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
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struct uniphier_clk_gate_data *gate = priv->socdata->gate;
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const struct uniphier_clk_gate_data *gate = priv->socdata->gate;
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unsigned int nr_gate = priv->socdata->nr_gate;
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unsigned int nr_gate = priv->socdata->nr_gate;
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void __iomem *reg;
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void __iomem *reg;
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u32 mask, data, tmp;
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u32 mask, data, tmp;
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@ -44,7 +44,7 @@ static int uniphier_clk_enable(struct clk *clk)
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static ulong uniphier_clk_get_rate(struct clk *clk)
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static ulong uniphier_clk_get_rate(struct clk *clk)
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{
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{
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struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
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struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
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struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
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const struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
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unsigned int nr_rdata = priv->socdata->nr_rate;
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unsigned int nr_rdata = priv->socdata->nr_rate;
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void __iomem *reg;
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void __iomem *reg;
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u32 mask, data;
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u32 mask, data;
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@ -78,7 +78,7 @@ static ulong uniphier_clk_get_rate(struct clk *clk)
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static ulong uniphier_clk_set_rate(struct clk *clk, ulong rate)
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static ulong uniphier_clk_set_rate(struct clk *clk, ulong rate)
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{
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{
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struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
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struct uniphier_clk_priv *priv = dev_get_priv(clk->dev);
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struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
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const struct uniphier_clk_rate_data *rdata = priv->socdata->rate;
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unsigned int nr_rdata = priv->socdata->nr_rate;
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unsigned int nr_rdata = priv->socdata->nr_rate;
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void __iomem *reg;
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void __iomem *reg;
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u32 mask, data, tmp;
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u32 mask, data, tmp;
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@ -115,7 +115,7 @@
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.data = 0x00020000, \
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.data = 0x00020000, \
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}
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}
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static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {
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static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {
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UNIPHIER_MIO_CLK_GATE_SD(0, 0),
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UNIPHIER_MIO_CLK_GATE_SD(0, 0),
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UNIPHIER_MIO_CLK_GATE_SD(1, 1),
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UNIPHIER_MIO_CLK_GATE_SD(1, 1),
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UNIPHIER_MIO_CLK_GATE_SD(2, 2), /* for PH1-Pro4 only */
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UNIPHIER_MIO_CLK_GATE_SD(2, 2), /* for PH1-Pro4 only */
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@ -126,13 +126,13 @@ static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {
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UNIPHIER_MIO_CLK_GATE_USB(3, 7), /* for PH1-sLD3 only */
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UNIPHIER_MIO_CLK_GATE_USB(3, 7), /* for PH1-sLD3 only */
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};
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};
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static struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = {
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static const struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = {
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UNIPHIER_MIO_CLK_RATE_SD(0, 0),
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UNIPHIER_MIO_CLK_RATE_SD(0, 0),
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UNIPHIER_MIO_CLK_RATE_SD(1, 1),
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UNIPHIER_MIO_CLK_RATE_SD(1, 1),
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UNIPHIER_MIO_CLK_RATE_SD(2, 2), /* for PH1-Pro4 only */
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UNIPHIER_MIO_CLK_RATE_SD(2, 2), /* for PH1-Pro4 only */
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};
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};
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static struct uniphier_clk_soc_data uniphier_mio_clk_data = {
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static const struct uniphier_clk_soc_data uniphier_mio_clk_data = {
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.gate = uniphier_mio_clk_gate,
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.gate = uniphier_mio_clk_gate,
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.nr_gate = ARRAY_SIZE(uniphier_mio_clk_gate),
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.nr_gate = ARRAY_SIZE(uniphier_mio_clk_gate),
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.rate = uniphier_mio_clk_rate,
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.rate = uniphier_mio_clk_rate,
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@ -27,9 +27,9 @@ struct uniphier_clk_rate_data {
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};
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};
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struct uniphier_clk_soc_data {
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struct uniphier_clk_soc_data {
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struct uniphier_clk_gate_data *gate;
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const struct uniphier_clk_gate_data *gate;
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unsigned int nr_gate;
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unsigned int nr_gate;
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struct uniphier_clk_rate_data *rate;
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const struct uniphier_clk_rate_data *rate;
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unsigned int nr_rate;
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unsigned int nr_rate;
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};
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};
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@ -48,7 +48,7 @@ struct uniphier_clk_soc_data {
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*/
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*/
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struct uniphier_clk_priv {
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struct uniphier_clk_priv {
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void __iomem *base;
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void __iomem *base;
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struct uniphier_clk_soc_data *socdata;
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const struct uniphier_clk_soc_data *socdata;
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};
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};
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extern const struct clk_ops uniphier_clk_ops;
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extern const struct clk_ops uniphier_clk_ops;
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