Merge branch 'master' of git://git.denx.de/u-boot-sh

This commit is contained in:
Tom Rini 2014-01-09 11:04:53 -05:00
commit 33d413fc91
30 changed files with 13 additions and 68 deletions

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@ -12,7 +12,7 @@ PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb -ffreestanding
else # SH2
PLATFORM_CPPFLAGS += -m3e -mb
endif
PLATFORM_CPPFLAGS += $(call cc-option,-mno-fdpic)
PLATFORM_CPPFLAGS += -DCONFIG_SH2 $(call cc-option,-mno-fdpic)
PLATFORM_RELFLAGS += -ffixed-r13
PLATFORM_LDFLAGS += $(ENDIANNESS)

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@ -23,11 +23,7 @@
int checkcpu(void)
{
#if defined(CONFIG_SH2A)
puts("CPU: SH2A\n");
#else
puts("CPU: SH2\n");
#endif
return 0;
}

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@ -11,5 +11,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
#
PLATFORM_CPPFLAGS += -m3
PLATFORM_CPPFLAGS += -DCONFIG_SH3 -m3
PLATFORM_RELFLAGS += -ffixed-r13

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@ -8,5 +8,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
#
PLATFORM_CPPFLAGS += -m4-nofpu
PLATFORM_CPPFLAGS += -DCONFIG_SH4 -m4-nofpu
PLATFORM_RELFLAGS += -ffixed-r13

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@ -13,11 +13,7 @@
int checkcpu(void)
{
#ifdef CONFIG_SH4A
puts("CPU: SH-4A\n");
#else
puts("CPU: SH4\n");
#endif
return 0;
}

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@ -1,7 +1,7 @@
#ifndef __ASM_SH_CACHE_H
#define __ASM_SH_CACHE_H
#if defined(CONFIG_SH4) || defined(CONFIG_SH4A)
#if defined(CONFIG_SH4)
int cache_control(unsigned int cmd);
@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; };
*/
#define ARCH_DMA_MINALIGN 32
#endif /* CONFIG_SH4 || CONFIG_SH4A */
#endif /* CONFIG_SH4 */
/*
* Use the L1 data cache line size value for the minimum DMA buffer alignment

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@ -1,12 +1,10 @@
#ifndef _ASM_SH_PROCESSOR_H_
#define _ASM_SH_PROCESSOR_H_
#if defined(CONFIG_SH2) || \
defined (CONFIG_SH2A)
#if defined(CONFIG_SH2)
# include <asm/cpu_sh2.h>
#elif defined (CONFIG_SH3)
#elif defined(CONFIG_SH3)
# include <asm/cpu_sh3.h>
#elif defined (CONFIG_SH4) || \
defined (CONFIG_SH4A)
#elif defined(CONFIG_SH4)
# include <asm/cpu_sh4.h>
#endif
#endif

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@ -84,5 +84,5 @@ void __udelay(unsigned long usec)
unsigned long get_tbclk(void)
{
return CONFIG_SYS_HZ;
return CONFIG_SH_CMT_CLK_FREQ;
}

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@ -10,8 +10,6 @@
#define __MIGO_R_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7722 1
#define CONFIG_MIGO_R 1

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@ -11,8 +11,6 @@
#define __AP325RXA_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7723 1
#define CONFIG_AP325RXA 1

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@ -10,9 +10,6 @@
#define __AP_SH4A_4A_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7734 1
#define CONFIG_AP_SH4A_4A 1
#define CONFIG_400MHZ_MODE 1

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@ -23,9 +23,6 @@
*/
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7724 1
#define CONFIG_BOARD_LATE_INIT 1
#define CONFIG_ECOVEC 1

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@ -10,8 +10,6 @@
#ifndef __ESPT_H
#define __ESPT_H
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7763 1
#define CONFIG_ESPT 1
#define __LITTLE_ENDIAN 1

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@ -24,8 +24,6 @@
#define CONFIG_VERSION_VARIABLE
/* CPU and platform */
#define CONFIG_SH 1
#define CONFIG_SH3 1
#define CONFIG_CPU_SH7720 1
#define CONFIG_MPR2 1

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@ -9,8 +9,6 @@
#ifndef __MS7720SE_H
#define __MS7720SE_H
#define CONFIG_SH 1
#define CONFIG_SH3 1
#define CONFIG_CPU_SH7720 1
#define CONFIG_MS7720SE 1

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@ -9,8 +9,6 @@
#ifndef __MS7722SE_H
#define __MS7722SE_H
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7722 1
#define CONFIG_MS7722SE 1

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@ -9,8 +9,6 @@
#ifndef __MS7750SE_H
#define __MS7750SE_H
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7750 1
/* #define CONFIG_CPU_SH7751 1 */
/* #define CONFIG_CPU_TYPE_R 1 */

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@ -10,9 +10,6 @@
#define __R0P7734_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7734 1
#define CONFIG_R0P7734 1
#define CONFIG_400MHZ_MODE 1

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@ -3,8 +3,6 @@
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7751 1
#define CONFIG_CPU_SH_TYPE_R 1
#define CONFIG_R2DPLUS 1

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@ -11,8 +11,6 @@
#define __R7780RP_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7780 1
#define CONFIG_R7780MP 1
#define CONFIG_SYS_R7780MP_OLD_FLASH 1

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@ -11,8 +11,6 @@
#define __RSK7203_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH2 1
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7203 1
#define CONFIG_RSK7203 1
@ -87,7 +85,7 @@
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
/* Network interface */
#define CONFIG_SMC911X

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@ -12,8 +12,6 @@
#define __RSK7264_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH2 1
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7264 1
#define CONFIG_RSK7264 1
@ -67,7 +65,7 @@
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
/* Network interface */
#define CONFIG_SMC911X

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@ -11,8 +11,6 @@
#define __RSK7269_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH2 1
#define CONFIG_SH2A 1
#define CONFIG_CPU_SH7269 1
#define CONFIG_RSK7269 1
@ -66,7 +64,7 @@
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
/* Network interface */
#define CONFIG_SMC911X

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@ -10,8 +10,6 @@
#define __SH7752EVB_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4A 1
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7752 1
#define CONFIG_SH7752EVB 1

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@ -10,8 +10,6 @@
#define __SH7753EVB_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4A 1
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7753 1
#define CONFIG_SH7753EVB 1

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@ -10,8 +10,6 @@
#define __SH7757LCR_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4A 1
#define CONFIG_SH_32BIT 1
#define CONFIG_CPU_SH7757 1
#define CONFIG_SH7757LCR 1

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@ -10,8 +10,6 @@
#ifndef __SH7763RDP_H
#define __SH7763RDP_H
#define CONFIG_SH 1
#define CONFIG_SH4 1
#define CONFIG_CPU_SH7763 1
#define CONFIG_SH7763RDP 1
#define __LITTLE_ENDIAN 1

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@ -10,8 +10,6 @@
#define __SH7785LCR_H
#undef DEBUG
#define CONFIG_SH 1
#define CONFIG_SH4A 1
#define CONFIG_CPU_SH7785 1
#define CONFIG_SH7785LCR 1

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@ -9,8 +9,6 @@
#ifndef __SHMIN_H
#define __SHMIN_H
#define CONFIG_SH 1
#define CONFIG_SH3 1
#define CONFIG_CPU_SH7706 1
/* T-SH7706LAN */
#define CONFIG_SHMIN 1

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@ -47,7 +47,7 @@ struct tmu_regs {
};
#endif /* CONFIG_SH3 */
#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) || defined(CONFIG_RMOBILE)
#if defined(CONFIG_SH4) || defined(CONFIG_RMOBILE)
struct tmu_regs {
u32 reserved;
u8 tstr;