Merge branch 'master' of git://git.denx.de/u-boot-sh
This commit is contained in:
commit
33d413fc91
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@ -12,7 +12,7 @@ PLATFORM_CPPFLAGS += -m2a -m2a-nofpu -mb -ffreestanding
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else # SH2
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PLATFORM_CPPFLAGS += -m3e -mb
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endif
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PLATFORM_CPPFLAGS += $(call cc-option,-mno-fdpic)
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PLATFORM_CPPFLAGS += -DCONFIG_SH2 $(call cc-option,-mno-fdpic)
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PLATFORM_RELFLAGS += -ffixed-r13
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PLATFORM_LDFLAGS += $(ENDIANNESS)
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@ -23,11 +23,7 @@
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int checkcpu(void)
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{
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#if defined(CONFIG_SH2A)
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puts("CPU: SH2A\n");
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#else
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puts("CPU: SH2\n");
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#endif
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return 0;
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}
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@ -11,5 +11,5 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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#
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PLATFORM_CPPFLAGS += -m3
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PLATFORM_CPPFLAGS += -DCONFIG_SH3 -m3
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PLATFORM_RELFLAGS += -ffixed-r13
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@ -8,5 +8,5 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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#
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PLATFORM_CPPFLAGS += -m4-nofpu
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PLATFORM_CPPFLAGS += -DCONFIG_SH4 -m4-nofpu
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PLATFORM_RELFLAGS += -ffixed-r13
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@ -13,11 +13,7 @@
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int checkcpu(void)
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{
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#ifdef CONFIG_SH4A
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puts("CPU: SH-4A\n");
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#else
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puts("CPU: SH4\n");
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#endif
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return 0;
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}
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@ -1,7 +1,7 @@
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#ifndef __ASM_SH_CACHE_H
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#define __ASM_SH_CACHE_H
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#if defined(CONFIG_SH4) || defined(CONFIG_SH4A)
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#if defined(CONFIG_SH4)
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int cache_control(unsigned int cmd);
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@ -18,7 +18,7 @@ struct __large_struct { unsigned long buf[100]; };
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*/
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#define ARCH_DMA_MINALIGN 32
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#endif /* CONFIG_SH4 || CONFIG_SH4A */
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#endif /* CONFIG_SH4 */
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/*
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* Use the L1 data cache line size value for the minimum DMA buffer alignment
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@ -1,12 +1,10 @@
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#ifndef _ASM_SH_PROCESSOR_H_
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#define _ASM_SH_PROCESSOR_H_
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#if defined(CONFIG_SH2) || \
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defined (CONFIG_SH2A)
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#if defined(CONFIG_SH2)
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# include <asm/cpu_sh2.h>
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#elif defined (CONFIG_SH3)
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#elif defined(CONFIG_SH3)
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# include <asm/cpu_sh3.h>
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#elif defined (CONFIG_SH4) || \
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defined (CONFIG_SH4A)
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#elif defined(CONFIG_SH4)
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# include <asm/cpu_sh4.h>
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#endif
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#endif
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@ -84,5 +84,5 @@ void __udelay(unsigned long usec)
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unsigned long get_tbclk(void)
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{
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return CONFIG_SYS_HZ;
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return CONFIG_SH_CMT_CLK_FREQ;
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}
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@ -10,8 +10,6 @@
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#define __MIGO_R_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7722 1
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#define CONFIG_MIGO_R 1
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@ -11,8 +11,6 @@
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#define __AP325RXA_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7723 1
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#define CONFIG_AP325RXA 1
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@ -10,9 +10,6 @@
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#define __AP_SH4A_4A_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_SH4A 1
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#define CONFIG_CPU_SH7734 1
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#define CONFIG_AP_SH4A_4A 1
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#define CONFIG_400MHZ_MODE 1
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@ -23,9 +23,6 @@
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*/
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_SH4A 1
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#define CONFIG_CPU_SH7724 1
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#define CONFIG_BOARD_LATE_INIT 1
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#define CONFIG_ECOVEC 1
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@ -10,8 +10,6 @@
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#ifndef __ESPT_H
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#define __ESPT_H
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7763 1
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#define CONFIG_ESPT 1
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#define __LITTLE_ENDIAN 1
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@ -24,8 +24,6 @@
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#define CONFIG_VERSION_VARIABLE
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/* CPU and platform */
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#define CONFIG_SH 1
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#define CONFIG_SH3 1
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#define CONFIG_CPU_SH7720 1
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#define CONFIG_MPR2 1
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@ -9,8 +9,6 @@
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#ifndef __MS7720SE_H
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#define __MS7720SE_H
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#define CONFIG_SH 1
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#define CONFIG_SH3 1
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#define CONFIG_CPU_SH7720 1
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#define CONFIG_MS7720SE 1
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@ -9,8 +9,6 @@
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#ifndef __MS7722SE_H
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#define __MS7722SE_H
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7722 1
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#define CONFIG_MS7722SE 1
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@ -9,8 +9,6 @@
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#ifndef __MS7750SE_H
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#define __MS7750SE_H
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7750 1
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/* #define CONFIG_CPU_SH7751 1 */
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/* #define CONFIG_CPU_TYPE_R 1 */
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@ -10,9 +10,6 @@
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#define __R0P7734_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_SH4A 1
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#define CONFIG_CPU_SH7734 1
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#define CONFIG_R0P7734 1
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#define CONFIG_400MHZ_MODE 1
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@ -3,8 +3,6 @@
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7751 1
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#define CONFIG_CPU_SH_TYPE_R 1
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#define CONFIG_R2DPLUS 1
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@ -11,8 +11,6 @@
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#define __R7780RP_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4A 1
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#define CONFIG_CPU_SH7780 1
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#define CONFIG_R7780MP 1
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#define CONFIG_SYS_R7780MP_OLD_FLASH 1
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@ -11,8 +11,6 @@
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#define __RSK7203_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH2 1
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#define CONFIG_SH2A 1
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#define CONFIG_CPU_SH7203 1
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#define CONFIG_RSK7203 1
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@ -87,7 +85,7 @@
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
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#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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/* Network interface */
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#define CONFIG_SMC911X
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@ -12,8 +12,6 @@
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#define __RSK7264_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH2 1
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#define CONFIG_SH2A 1
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#define CONFIG_CPU_SH7264 1
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#define CONFIG_RSK7264 1
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@ -67,7 +65,7 @@
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
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#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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/* Network interface */
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#define CONFIG_SMC911X
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@ -11,8 +11,6 @@
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#define __RSK7269_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH2 1
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#define CONFIG_SH2A 1
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#define CONFIG_CPU_SH7269 1
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#define CONFIG_RSK7269 1
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#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */
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#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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#define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
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/* Network interface */
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#define CONFIG_SMC911X
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@ -10,8 +10,6 @@
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#define __SH7752EVB_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4A 1
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#define CONFIG_SH_32BIT 1
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#define CONFIG_CPU_SH7752 1
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#define CONFIG_SH7752EVB 1
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@ -10,8 +10,6 @@
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#define __SH7753EVB_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4A 1
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#define CONFIG_SH_32BIT 1
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#define CONFIG_CPU_SH7753 1
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#define CONFIG_SH7753EVB 1
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@ -10,8 +10,6 @@
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#define __SH7757LCR_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4A 1
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#define CONFIG_SH_32BIT 1
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#define CONFIG_CPU_SH7757 1
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#define CONFIG_SH7757LCR 1
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@ -10,8 +10,6 @@
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#ifndef __SH7763RDP_H
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#define __SH7763RDP_H
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#define CONFIG_SH 1
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#define CONFIG_SH4 1
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#define CONFIG_CPU_SH7763 1
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#define CONFIG_SH7763RDP 1
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#define __LITTLE_ENDIAN 1
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@ -10,8 +10,6 @@
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#define __SH7785LCR_H
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#undef DEBUG
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#define CONFIG_SH 1
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#define CONFIG_SH4A 1
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#define CONFIG_CPU_SH7785 1
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#define CONFIG_SH7785LCR 1
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@ -9,8 +9,6 @@
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#ifndef __SHMIN_H
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#define __SHMIN_H
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#define CONFIG_SH 1
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#define CONFIG_SH3 1
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#define CONFIG_CPU_SH7706 1
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/* T-SH7706LAN */
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#define CONFIG_SHMIN 1
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@ -47,7 +47,7 @@ struct tmu_regs {
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};
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#endif /* CONFIG_SH3 */
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#if defined(CONFIG_SH4) || defined(CONFIG_SH4A) || defined(CONFIG_RMOBILE)
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#if defined(CONFIG_SH4) || defined(CONFIG_RMOBILE)
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struct tmu_regs {
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u32 reserved;
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u8 tstr;
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