at91: Add esd gmbh MEESC board support
This patch adds support for esd gmbh MEESC board. The MEESC is based on an Atmel AT91SAM9263 SoC. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
This commit is contained in:
Daniel Gorsulowski
Jean-Christophe PLAGNIOL-VILLARD
parent
21761540b4
commit
33b1d3f43a
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@ -537,6 +537,10 @@ Peter Figuli <peposh@etc.sk>
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wepep250 xscale
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wepep250 xscale
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Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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meesc ARM926EJS (AT91SAM9263 SoC)
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Marius Gröger <mag@sysgo.de>
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Marius Gröger <mag@sysgo.de>
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impa7 ARM720T (EP7211)
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impa7 ARM720T (EP7211)
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1
MAKEALL
1
MAKEALL
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@ -588,6 +588,7 @@ LIST_at91=" \
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cmc_pu2 \
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cmc_pu2 \
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csb637 \
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csb637 \
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kb9202 \
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kb9202 \
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meesc \
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mp2usb \
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mp2usb \
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m501sk \
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m501sk \
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pm9261 \
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pm9261 \
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3
Makefile
3
Makefile
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@ -2791,6 +2791,9 @@ at91sam9rlek_config : unconfig
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fi;
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fi;
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@$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
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@$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
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meesc_config : unconfig
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@$(MKCONFIG) $(@:_config=) arm arm926ejs meesc esd at91
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pm9261_config : unconfig
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pm9261_config : unconfig
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@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9261 ronetix at91
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@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9261 ronetix at91
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@ -0,0 +1,55 @@
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2008
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# Stelian Pop <stelian.pop@leadtechdesign.com>
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# Lead Tech Design <www.leadtechdesign.com>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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COBJS-y += $(BOARD).o
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COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
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SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS-y))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1 @@
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TEXT_BASE = 0x21f00000
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@ -0,0 +1,198 @@
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2009
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* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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* esd electronic system design gmbh <www.esd.eu>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/at91sam9263.h>
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#include <asm/arch/at91sam9_matrix.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/at91_rstc.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/io.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscelaneous platform dependent initialisations
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*/
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static int hw_rev = -1; /* hardware revision */
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int get_hw_rev(void)
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{
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if (hw_rev >= 0)
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return hw_rev;
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hw_rev = at91_get_gpio_value(AT91_PIN_PB19);
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hw_rev |= at91_get_gpio_value(AT91_PIN_PB20) << 1;
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hw_rev |= at91_get_gpio_value(AT91_PIN_PB21) << 2;
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hw_rev |= at91_get_gpio_value(AT91_PIN_PB22) << 3;
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if (hw_rev == 15)
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hw_rev = 0;
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return hw_rev;
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}
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#ifdef CONFIG_CMD_NAND
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static void meesc_nand_hw_init(void)
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{
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unsigned long csa;
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/* Enable CS3 */
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csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
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at91_sys_write(AT91_MATRIX_EBI0CSA,
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csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
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/* Configure SMC CS3 for NAND/SmartMedia */
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at91_sys_write(AT91_SMC_SETUP(3),
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AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
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AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
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at91_sys_write(AT91_SMC_PULSE(3),
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AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
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AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
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at91_sys_write(AT91_SMC_CYCLE(3),
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AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
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at91_sys_write(AT91_SMC_MODE(3),
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AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
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AT91_SMC_EXNWMODE_DISABLE |
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#ifdef CONFIG_SYS_NAND_DBW_16
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AT91_SMC_DBW_16 |
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#else /* CONFIG_SYS_NAND_DBW_8 */
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AT91_SMC_DBW_8 |
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#endif
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AT91_SMC_TDF_(2));
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/* Configure RDY/BSY */
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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/* Enable NandFlash */
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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}
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#endif /* CONFIG_CMD_NAND */
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#ifdef CONFIG_MACB
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static void meesc_macb_hw_init(void)
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{
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/* Enable clock */
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
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at91_macb_hw_init();
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}
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#endif
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/*
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* Static memory controller initialization to enable Beckhoff ET1100 EtherCAT
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* controller debugging
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* The ET1100 is located at physical address 0x70000000
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* Its process memory is located at physical address 0x70001000
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*/
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static void meesc_ethercat_hw_init(void)
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{
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/* Configure SMC EBI1_CS0 for EtherCAT */
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at91_sys_write(AT91_SMC1_SETUP(0),
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AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
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AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
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at91_sys_write(AT91_SMC1_PULSE(0),
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AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(9) |
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AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(9));
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at91_sys_write(AT91_SMC1_CYCLE(0),
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AT91_SMC_NWECYCLE_(10) | AT91_SMC_NRDCYCLE_(5));
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/* Configure behavior at external wait signal, byte-select mode, 16 bit
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data bus width, none data float wait states and TDF optimization */
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at91_sys_write(AT91_SMC1_MODE(0),
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AT91_SMC_READMODE | AT91_SMC_EXNWMODE_READY |
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AT91_SMC_BAT_SELECT | AT91_SMC_DBW_16 | AT91_SMC_TDF_(0) |
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AT91_SMC_TDFMODE);
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/* Configure RDY/BSY */
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at91_set_B_periph(AT91_PIN_PE20, 0); /* EBI1_NWAIT */
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}
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = get_ram_size((long *) PHYS_SDRAM, (1 << 27));
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_MACB
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rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x00);
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#endif
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return rc;
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}
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int checkboard(void)
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{
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char str[32];
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puts("Board: esd CAN-EtherCAT Gateway");
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if (getenv_r("serial#", str, sizeof(str)) > 0) {
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puts(", serial# ");
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puts(str);
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}
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printf("\nHardware-revision: 1.%d\n", get_hw_rev());
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printf("Mach-type: %lu\n", gd->bd->bi_arch_number);
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return 0;
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}
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int board_init(void)
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{
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/* Peripheral Clock Enable Register */
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at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA |
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1 << AT91SAM9263_ID_PIOB |
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1 << AT91SAM9263_ID_PIOCDE);
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/* arch number of MEESC-Board */
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gd->bd->bi_arch_number = MACH_TYPE_MEESC;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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at91_serial_hw_init();
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#ifdef CONFIG_CMD_NAND
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meesc_nand_hw_init();
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#endif
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meesc_ethercat_hw_init();
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#ifdef CONFIG_HAS_DATAFLASH
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at91_spi0_hw_init(1 << 0);
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#endif
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#ifdef CONFIG_MACB
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meesc_macb_hw_init();
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#endif
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#ifdef CONFIG_AT91_CAN
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at91_can_hw_init();
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#endif
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return 0;
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}
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@ -0,0 +1,37 @@
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/*
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* (C) Copyright 2008
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* Ulf Samuelsson <ulf@atmel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
|
||||||
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* published by the Free Software Foundation; either version 2 of
|
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|
* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
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|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
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* MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <config.h>
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#include <asm/hardware.h>
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#include <dataflash.h>
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AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
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struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
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{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
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};
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/* define the area offsets */
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dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
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{0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"},
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{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"},
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{0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"},
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};
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@ -0,0 +1,188 @@
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* (C) Copyright 2009
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* Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
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* esd electronic system design gmbh <www.esd.eu>
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*
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* Configuation settings for the esd MEESC board.
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*
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* See file CREDITS for list of people who contributed to this
|
||||||
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* project.
|
||||||
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*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License as
|
||||||
|
* published by the Free Software Foundation; either version 2 of
|
||||||
|
* the License, or (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||||
|
* MA 02111-1307 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __CONFIG_H
|
||||||
|
#define __CONFIG_H
|
||||||
|
|
||||||
|
/* Common stuff */
|
||||||
|
#define CONFIG_SYS_HZ 1000 /* decrementer freq */
|
||||||
|
#define CONFIG_MEESC 1 /* Board is esd MEESC */
|
||||||
|
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||||
|
#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */
|
||||||
|
#define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */
|
||||||
|
#define CONFIG_DISPLAY_BOARDINFO 1
|
||||||
|
#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */
|
||||||
|
#define CONFIG_PREBOOT /* enable preboot variable */
|
||||||
|
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||||
|
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||||
|
#define CONFIG_INITRD_TAG 1
|
||||||
|
#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
|
||||||
|
|
||||||
|
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||||
|
#define CONFIG_SKIP_RELOCATE_UBOOT
|
||||||
|
|
||||||
|
#define CONFIG_ARCH_CPU_INIT
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Hardware drivers
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Console output */
|
||||||
|
#define CONFIG_ATMEL_USART 1
|
||||||
|
#undef CONFIG_USART0
|
||||||
|
#undef CONFIG_USART1
|
||||||
|
#undef CONFIG_USART2
|
||||||
|
#define CONFIG_USART3 1 /* USART 3 is DBGU */
|
||||||
|
|
||||||
|
#define CONFIG_BOOTDELAY 3
|
||||||
|
#define CONFIG_ZERO_BOOTDELAY_CHECK 1
|
||||||
|
|
||||||
|
/*
|
||||||
|
* BOOTP options
|
||||||
|
*/
|
||||||
|
#define CONFIG_BOOTP_BOOTFILESIZE 1
|
||||||
|
#define CONFIG_BOOTP_BOOTPATH 1
|
||||||
|
#define CONFIG_BOOTP_GATEWAY 1
|
||||||
|
#define CONFIG_BOOTP_HOSTNAME 1
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Command line configuration.
|
||||||
|
*/
|
||||||
|
#include <config_cmd_default.h>
|
||||||
|
#undef CONFIG_CMD_BDI
|
||||||
|
#undef CONFIG_CMD_AUTOSCRIPT
|
||||||
|
#undef CONFIG_CMD_FPGA
|
||||||
|
#undef CONFIG_CMD_LOADS
|
||||||
|
#undef CONFIG_CMD_IMLS
|
||||||
|
#undef CONFIG_CMD_USB
|
||||||
|
|
||||||
|
#define CONFIG_CMD_PING 1
|
||||||
|
#define CONFIG_CMD_DHCP 1
|
||||||
|
#define CONFIG_CMD_NAND 1
|
||||||
|
|
||||||
|
/* LED */
|
||||||
|
#define CONFIG_AT91_LED 1
|
||||||
|
|
||||||
|
/* SDRAM */
|
||||||
|
#define CONFIG_NR_DRAM_BANKS 1
|
||||||
|
#define PHYS_SDRAM 0x20000000
|
||||||
|
|
||||||
|
/* DataFlash */
|
||||||
|
#define CONFIG_ATMEL_DATAFLASH_SPI
|
||||||
|
#define CONFIG_HAS_DATAFLASH 1
|
||||||
|
#define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
|
||||||
|
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
|
||||||
|
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
|
||||||
|
#define AT91_SPI_CLK 15000000
|
||||||
|
#define DATAFLASH_TCSS (0x1a << 16)
|
||||||
|
#define DATAFLASH_TCHS (0x1 << 24)
|
||||||
|
|
||||||
|
/* NOR flash is not populated, disable it */
|
||||||
|
#define CONFIG_SYS_NO_FLASH 1
|
||||||
|
|
||||||
|
/* NAND flash */
|
||||||
|
#ifdef CONFIG_CMD_NAND
|
||||||
|
#define CONFIG_NAND_ATMEL
|
||||||
|
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||||
|
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||||
|
#define CONFIG_SYS_NAND_DBW_8 1
|
||||||
|
/* our ALE is AD21 */
|
||||||
|
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
|
||||||
|
/* our CLE is AD22 */
|
||||||
|
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
|
||||||
|
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
|
||||||
|
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Ethernet */
|
||||||
|
#define CONFIG_MACB 1
|
||||||
|
#define CONFIG_RMII 1
|
||||||
|
#define CONFIG_NET_MULTI 1
|
||||||
|
#define CONFIG_NET_RETRY_COUNT 20
|
||||||
|
#undef CONFIG_RESET_PHY_R
|
||||||
|
|
||||||
|
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
|
||||||
|
|
||||||
|
#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
|
||||||
|
#define CONFIG_SYS_MEMTEST_END 0x21e00000
|
||||||
|
|
||||||
|
#define CONFIG_SYS_USE_DATAFLASH 1
|
||||||
|
#undef CONFIG_SYS_USE_NANDFLASH
|
||||||
|
|
||||||
|
#ifdef CONFIG_SYS_USE_DATAFLASH
|
||||||
|
|
||||||
|
/* CAN */
|
||||||
|
#define CONFIG_AT91_CAN 1
|
||||||
|
|
||||||
|
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
|
||||||
|
#define CONFIG_ENV_IS_IN_DATAFLASH 1
|
||||||
|
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
|
||||||
|
0x8400)
|
||||||
|
#define CONFIG_ENV_OFFSET 0x4200
|
||||||
|
#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
|
||||||
|
CONFIG_ENV_OFFSET)
|
||||||
|
#define CONFIG_ENV_SIZE 0x4200
|
||||||
|
#define CONFIG_BOOTCOMMAND "cp.b C0042000 22000000 210000; bootm"
|
||||||
|
|
||||||
|
#else /* CONFIG_SYS_USE_NANDFLASH */
|
||||||
|
|
||||||
|
/* bootstrap + u-boot + env + linux in nandflash */
|
||||||
|
#define CONFIG_ENV_IS_IN_NAND 1
|
||||||
|
#define CONFIG_ENV_OFFSET 0x60000
|
||||||
|
#define CONFIG_ENV_OFFSET_REDUND 0x80000
|
||||||
|
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
|
||||||
|
#define CONFIG_BOOTCOMMAND "nand read 22000000 A0000 200000; bootm"
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define CONFIG_BAUDRATE 115200
|
||||||
|
#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
|
||||||
|
|
||||||
|
#define CONFIG_SYS_PROMPT "=> "
|
||||||
|
#define CONFIG_SYS_CBSIZE 256
|
||||||
|
#define CONFIG_SYS_MAXARGS 16
|
||||||
|
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||||
|
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||||
|
#define CONFIG_SYS_LONGHELP 1
|
||||||
|
#define CONFIG_CMDLINE_EDITING 1
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Size of malloc() pool
|
||||||
|
*/
|
||||||
|
#define CONFIG_SYS_MALLOC_LEN 0x2D000
|
||||||
|
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
|
||||||
|
|
||||||
|
#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
|
||||||
|
|
||||||
|
#ifdef CONFIG_USE_IRQ
|
||||||
|
#error CONFIG_USE_IRQ not supported
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
||||||
Loading…
Reference in New Issue