8xx serial, smc: add configurable SMC Rx buffer len
This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. With this option it is possible to allow the receive buffer for the SMC on 8xx to be greater then 1. In case CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the old version. When defining CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE must be defined to setup the maximum idle timeout for the SMC. Signed-off-by: Heiko Schocher <hs@denx.de>
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e915f8bb73
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README
2
README
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@ -487,7 +487,7 @@ The following options need to be configured:
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- Console Rx buffer length
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- Console Rx buffer length
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With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
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With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
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the maximum receive buffer length for the SMC.
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the maximum receive buffer length for the SMC.
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This option is actual only for 82xx possible.
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This option is actual only for 82xx and 8xx possible.
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If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
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If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
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must be defined, to setup the maximum idle timeout for
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must be defined, to setup the maximum idle timeout for
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the SMC.
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the SMC.
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@ -65,6 +65,23 @@ DECLARE_GLOBAL_DATA_PTR;
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#endif /* CONFIG_8xx_CONS_SCCx */
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#endif /* CONFIG_8xx_CONS_SCCx */
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#if !defined(CONFIG_SYS_SMC_RXBUFLEN)
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#define CONFIG_SYS_SMC_RXBUFLEN 1
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#define CONFIG_SYS_MAXIDLE 0
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#else
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#if !defined(CONFIG_SYS_MAXIDLE)
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#error "you must define CONFIG_SYS_MAXIDLE"
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#endif
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#endif
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typedef volatile struct serialbuffer {
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cbd_t rxbd; /* Rx BD */
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cbd_t txbd; /* Tx BD */
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uint rxindex; /* index for next character to read */
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volatile uchar rxbuf[CONFIG_SYS_SMC_RXBUFLEN];/* rx buffers */
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volatile uchar txbuf; /* tx buffers */
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} serialbuffer_t;
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static void serial_setdivisor(volatile cpm8xx_t *cp)
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static void serial_setdivisor(volatile cpm8xx_t *cp)
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{
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{
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int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate;
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int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate;
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@ -113,12 +130,12 @@ static int smc_init (void)
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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volatile smc_t *sp;
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volatile smc_t *sp;
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volatile smc_uart_t *up;
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volatile smc_uart_t *up;
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volatile cbd_t *tbdf, *rbdf;
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volatile cpm8xx_t *cp = &(im->im_cpm);
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volatile cpm8xx_t *cp = &(im->im_cpm);
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#if (!defined(CONFIG_8xx_CONS_SMC1)) && (defined(CONFIG_MPC823) || defined(CONFIG_MPC850))
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#if (!defined(CONFIG_8xx_CONS_SMC1)) && (defined(CONFIG_MPC823) || defined(CONFIG_MPC850))
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volatile iop8xx_t *ip = (iop8xx_t *)&(im->im_ioport);
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volatile iop8xx_t *ip = (iop8xx_t *)&(im->im_ioport);
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#endif
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#endif
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uint dpaddr;
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uint dpaddr;
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volatile serialbuffer_t *rtx;
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/* initialize pointers to SMC */
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/* initialize pointers to SMC */
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@ -194,23 +211,26 @@ static int smc_init (void)
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*/
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*/
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#ifdef CONFIG_SYS_ALLOC_DPRAM
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#ifdef CONFIG_SYS_ALLOC_DPRAM
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dpaddr = dpram_alloc_align (sizeof(cbd_t)*2 + 2, 8) ;
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/* allocate
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* size of struct serialbuffer with bd rx/tx, buffer rx/tx and rx index
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*/
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dpaddr = dpram_alloc_align((sizeof(serialbuffer_t)), 8);
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#else
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#else
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dpaddr = CPM_SERIAL_BASE ;
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dpaddr = CPM_SERIAL_BASE ;
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#endif
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#endif
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rtx = (serialbuffer_t *)&cp->cp_dpmem[dpaddr];
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/* Allocate space for two buffer descriptors in the DP ram.
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/* Allocate space for two buffer descriptors in the DP ram.
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* For now, this address seems OK, but it may have to
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* For now, this address seems OK, but it may have to
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* change with newer versions of the firmware.
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* change with newer versions of the firmware.
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* damm: allocating space after the two buffers for rx/tx data
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* damm: allocating space after the two buffers for rx/tx data
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*/
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*/
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rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr];
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rtx->rxbd.cbd_bufaddr = (uint) &rtx->rxbuf;
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rbdf->cbd_bufaddr = (uint) (rbdf+2);
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rtx->rxbd.cbd_sc = 0;
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rbdf->cbd_sc = 0;
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tbdf = rbdf + 1;
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rtx->txbd.cbd_bufaddr = (uint) &rtx->txbuf;
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tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1;
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rtx->txbd.cbd_sc = 0;
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tbdf->cbd_sc = 0;
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/* Set up the uart parameters in the parameter ram.
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/* Set up the uart parameters in the parameter ram.
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*/
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*/
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@ -256,13 +276,13 @@ static int smc_init (void)
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/* Make the first buffer the only buffer.
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/* Make the first buffer the only buffer.
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*/
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*/
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tbdf->cbd_sc |= BD_SC_WRAP;
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rtx->txbd.cbd_sc |= BD_SC_WRAP;
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rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
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rtx->rxbd.cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
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/* Single character receive.
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/* single/multi character receive. */
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*/
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up->smc_mrblr = CONFIG_SYS_SMC_RXBUFLEN;
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up->smc_mrblr = 1;
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up->smc_maxidl = CONFIG_SYS_MAXIDLE;
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up->smc_maxidl = 0;
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rtx->rxindex = 0;
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/* Initialize Tx/Rx parameters.
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/* Initialize Tx/Rx parameters.
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*/
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*/
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@ -285,11 +305,10 @@ static int smc_init (void)
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static void
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static void
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smc_putc(const char c)
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smc_putc(const char c)
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{
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{
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volatile cbd_t *tbdf;
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volatile char *buf;
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volatile smc_uart_t *up;
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volatile smc_uart_t *up;
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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volatile cpm8xx_t *cpmp = &(im->im_cpm);
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volatile cpm8xx_t *cpmp = &(im->im_cpm);
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volatile serialbuffer_t *rtx;
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#ifdef CONFIG_MODEM_SUPPORT
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#ifdef CONFIG_MODEM_SUPPORT
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if (gd->be_quiet)
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if (gd->be_quiet)
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@ -304,19 +323,16 @@ smc_putc(const char c)
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up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
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up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
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#endif
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#endif
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tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
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rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
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/* Wait for last character to go.
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/* Wait for last character to go.
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*/
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*/
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rtx->txbuf = c;
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buf = (char *)tbdf->cbd_bufaddr;
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rtx->txbd.cbd_datlen = 1;
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rtx->txbd.cbd_sc |= BD_SC_READY;
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*buf = c;
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tbdf->cbd_datlen = 1;
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tbdf->cbd_sc |= BD_SC_READY;
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__asm__("eieio");
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__asm__("eieio");
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while (tbdf->cbd_sc & BD_SC_READY) {
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while (rtx->txbd.cbd_sc & BD_SC_READY) {
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WATCHDOG_RESET ();
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WATCHDOG_RESET ();
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__asm__("eieio");
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__asm__("eieio");
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}
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}
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@ -333,49 +349,53 @@ smc_puts (const char *s)
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static int
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static int
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smc_getc(void)
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smc_getc(void)
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{
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{
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volatile cbd_t *rbdf;
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volatile unsigned char *buf;
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volatile smc_uart_t *up;
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volatile smc_uart_t *up;
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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volatile cpm8xx_t *cpmp = &(im->im_cpm);
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volatile cpm8xx_t *cpmp = &(im->im_cpm);
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unsigned char c;
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volatile serialbuffer_t *rtx;
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unsigned char c;
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up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
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up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
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#ifdef CONFIG_SYS_SMC_UCODE_PATCH
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#ifdef CONFIG_SYS_SMC_UCODE_PATCH
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up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
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up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
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#endif
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#endif
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rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
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rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
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/* Wait for character to show up.
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/* Wait for character to show up.
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*/
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*/
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buf = (unsigned char *)rbdf->cbd_bufaddr;
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while (rtx->rxbd.cbd_sc & BD_SC_EMPTY)
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while (rbdf->cbd_sc & BD_SC_EMPTY)
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WATCHDOG_RESET ();
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WATCHDOG_RESET ();
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c = *buf;
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/* the characters are read one by one,
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rbdf->cbd_sc |= BD_SC_EMPTY;
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* use the rxindex to know the next char to deliver
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*/
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c = *(unsigned char *) (rtx->rxbd.cbd_bufaddr+rtx->rxindex);
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rtx->rxindex++;
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/* check if all char are readout, then make prepare for next receive */
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if (rtx->rxindex >= rtx->rxbd.cbd_datlen) {
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rtx->rxindex = 0;
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rtx->rxbd.cbd_sc |= BD_SC_EMPTY;
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}
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return(c);
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return(c);
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}
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}
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static int
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static int
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smc_tstc(void)
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smc_tstc(void)
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{
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{
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volatile cbd_t *rbdf;
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volatile smc_uart_t *up;
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volatile smc_uart_t *up;
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
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volatile cpm8xx_t *cpmp = &(im->im_cpm);
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volatile cpm8xx_t *cpmp = &(im->im_cpm);
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volatile serialbuffer_t *rtx;
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up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
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up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC];
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#ifdef CONFIG_SYS_SMC_UCODE_PATCH
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#ifdef CONFIG_SYS_SMC_UCODE_PATCH
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up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
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up = (smc_uart_t *) &cpmp->cp_dpmem[up->smc_rpbase];
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#endif
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#endif
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rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
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rtx = (serialbuffer_t *)&cpmp->cp_dpmem[up->smc_rbase];
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return(!(rbdf->cbd_sc & BD_SC_EMPTY));
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return !(rtx->rxbd.cbd_sc & BD_SC_EMPTY);
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}
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}
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struct serial_device serial_smc_device =
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struct serial_device serial_smc_device =
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