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mtd: nand: mxs: fix cache alignment for cache lines >32 

Currently the command buffer gets allocated with a size of 32 bytes.
This causes warning messages on systems with cache lines bigger than
32 bytes:
CACHE: Misaligned operation at range [9df17a00, 9df17a20]

Define command buffer to be at least 32 bytes, but more if cache
line is bigger.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Stefan Agner 2016-08-01 23:55:18 -07:00 committed by Stefano Babic
parent 0a22c7f0dc
commit 2a83c95fdb
1 changed files with 5 additions and 0 deletions
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5
drivers/mtd/nand/mxs_nand.c
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@ -37,7 +37,12 @@
#endif
#define MXS_NAND_METADATA_SIZE 10
#define MXS_NAND_BITS_PER_ECC_LEVEL 13
#if !defined(CONFIG_SYS_CACHELINE_SIZE) || CONFIG_SYS_CACHELINE_SIZE < 32
#define MXS_NAND_COMMAND_BUFFER_SIZE 32
#else
#define MXS_NAND_COMMAND_BUFFER_SIZE CONFIG_SYS_CACHELINE_SIZE
#endif
#define MXS_NAND_BCH_TIMEOUT 10000