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ARM: DRA7: emif: Enable interleaving for higher address space 

Given that DRA7/OMAP5 SoCs can support more than 2GB of memory,
enable interleaving for this higher memory to increase performance.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Lokesh Vutla 2016-03-05 17:32:31 +05:30 committed by Tom Rini
parent e3ce3aa103
commit 29c20ba235
2 changed files with 5 additions and 0 deletions
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2
arch/arm/cpu/armv7/omap-common/emif-common.c
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@ -1329,6 +1329,8 @@ void dmm_init(u32 base)
&hw_lisa_map_regs->dmm_lisa_map_1); &hw_lisa_map_regs->dmm_lisa_map_1);
writel(lisa_map_regs->dmm_lisa_map_0, writel(lisa_map_regs->dmm_lisa_map_0,
&hw_lisa_map_regs->dmm_lisa_map_0); &hw_lisa_map_regs->dmm_lisa_map_0);
setbits_le32(MA_PRIORITY, MA_HIMEM_INTERLEAVE_UN_MASK);
} }
/* /*

3
arch/arm/include/asm/emif.h
View File

@ -545,6 +545,9 @@
/* Memory Adapter */ /* Memory Adapter */
#define MA_BASE 0x482AF040 #define MA_BASE 0x482AF040
#define MA_PRIORITY 0x482A2000
#define MA_HIMEM_INTERLEAVE_UN_SHIFT 8
#define MA_HIMEM_INTERLEAVE_UN_MASK (1 << 8)
/* DMM_LISA_MAP */ /* DMM_LISA_MAP */
#define EMIF_SYS_ADDR_SHIFT 24 #define EMIF_SYS_ADDR_SHIFT 24