ARM: DRA7: emif: Enable interleaving for higher address space
Given that DRA7/OMAP5 SoCs can support more than 2GB of memory, enable interleaving for this higher memory to increase performance. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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@ -1329,6 +1329,8 @@ void dmm_init(u32 base)
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&hw_lisa_map_regs->dmm_lisa_map_1);
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writel(lisa_map_regs->dmm_lisa_map_0,
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&hw_lisa_map_regs->dmm_lisa_map_0);
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setbits_le32(MA_PRIORITY, MA_HIMEM_INTERLEAVE_UN_MASK);
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}
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/*
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@ -545,6 +545,9 @@
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/* Memory Adapter */
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#define MA_BASE 0x482AF040
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#define MA_PRIORITY 0x482A2000
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#define MA_HIMEM_INTERLEAVE_UN_SHIFT 8
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#define MA_HIMEM_INTERLEAVE_UN_MASK (1 << 8)
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/* DMM_LISA_MAP */
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#define EMIF_SYS_ADDR_SHIFT 24
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