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Revert "x86: broadwell: gpio: Remove the codes to set up pin control" 

This makes the assumption that setting up pinctrl in cpu_init_r() is safe.
On samus we need GPIOs before relocation in order to support power control.
This commit fixes the following message on boot:

   initcall sequence ffe5c6f4 failed at call ffe01d3d (err=-1)
   ### ERROR ### Please RESET the board ###

In any case it seems better to leave init to driver model, so that it can
pick up the GPIO driver when it needs it. Since pinctrl is a dependency of
the GPIO driver, we may as well put the dependency there and avoid these
problems.

This reverts commit 9769e05bcf.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Simon Glass 2016-10-05 20:42:09 -06:00 committed by Bin Meng
parent 88d915b10f
commit 26f50fbed2
1 changed files with 7 additions and 0 deletions
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7
drivers/gpio/intel_broadwell_gpio.c
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@ -9,6 +9,7 @@
#include <fdtdec.h> #include <fdtdec.h>
#include <pch.h> #include <pch.h>
#include <pci.h> #include <pci.h>
#include <syscon.h>
#include <asm/cpu.h> #include <asm/cpu.h>
#include <asm/gpio.h> #include <asm/gpio.h>
#include <asm/io.h> #include <asm/io.h>
@ -118,6 +119,12 @@ static int broadwell_gpio_probe(struct udevice *dev)
struct broadwell_bank_platdata *plat = dev_get_platdata(dev); struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct broadwell_bank_priv *priv = dev_get_priv(dev); struct broadwell_bank_priv *priv = dev_get_priv(dev);
struct udevice *pinctrl;
int ret;
/* Set up pin control if available */
ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &pinctrl);
debug("%s, pinctrl=%p, ret=%d\n", __func__, pinctrl, ret);
uc_priv->gpio_count = GPIO_PER_BANK; uc_priv->gpio_count = GPIO_PER_BANK;
uc_priv->bank_name = plat->bank_name; uc_priv->bank_name = plat->bank_name;