powerpc: ppc4xx: remove redundant CONFIG_4xx definition
We do not have to define CONFIG_4xx in board config headers because it is defined in arch/powerpc/cpu/ppc4xx/config.mk. include/configs/JSE.h defines "CONFIG_4x", not "CONFIG_4xx". I believe it is a typo because "CONFIG_4x" is not used at all in other files. So, I also deleted "CONFIG_4x" in include/configs/JSE.h. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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c4928c34b0
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1a0afe1fad
include/configs
APC405.hAR405.hASH405.hCATcenter.hCMS700.hCPCI2DP.hCPCI405.hCPCI4052.hCPCI405AB.hCPCI405DT.hCPCIISER4.hCRAYL1.hDP405.hDU405.hDU440.hG2000.hHH405.hHUB405.hJSE.hKAREF.hMETROBOX.hMIP405.hOCRTC.hPCI405.hPIP405.hPLU405.hPMC405.hPMC405DE.hPMC440.hPPChameleonEVB.hVOH405.hVOM405.hW7OLMC.hW7OLMG.hWUH405.hacadia.halpr.hbamboo.hbluestone.hbubinga.hcanyonlands.hcsb272.hcsb472.hdlvision-10g.hdlvision.hebony.hgdppc440etx.hicon.hintip.hio.hio64.hiocon.hkatmai.hkilauea.hkorat.hluan.hlwmon5.hmakalu.hneo.hocotea.hp3p440.hpcs440ep.hquad100hd.hredwood.hsbc405.hsc3.hsequoia.ht3corp.htaihu.htaishan.hwalnut.hxilinx-ppc405.hxilinx-ppc440.hxpedite1000.hyosemite.hyucca.hzeus.h
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@ -19,7 +19,6 @@
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* (easy to change)
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_APCG405 1 /* ...on a APC405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_AR405 1 /* ...on a AR405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_ASH405 1 /* ...on a ASH405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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@ -59,7 +59,6 @@
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_VOM405 1 /* ...on a VOM405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC8000
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */
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#define CONFIG_CPCI405_VER2 1 /* ...version 2 */
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#undef CONFIG_CPCI405_6U /* enable this for 6U boards */
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */
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#define CONFIG_CPCI405_VER2 1 /* ...version 2 */
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#define CONFIG_CPCI405AB 1 /* ...and special AB version */
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */
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#define CONFIG_CPCI405_VER2 1 /* ...version 2 */
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_CPCIISER4 1 /* ...on a CPCIISER4 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC405 family */
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/*
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* Note: I make an "image" from U-Boot itself, which prefixes 0x40
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@ -18,7 +18,6 @@
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_DP405 1 /* ...on a DP405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
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@ -17,7 +17,6 @@
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* (easy to change)
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_DU405 1 /* ...on a DU405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
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*/
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#define CONFIG_DU440 1 /* Board is esd DU440 */
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#define CONFIG_440EPX 1 /* Specific PPC440EPx */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_SYS_CLK_FREQ 33333400 /* external freq to pll */
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#ifndef CONFIG_SYS_TEXT_BASE
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_G2000 1 /* ...on a PLU405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_HH405 1 /* ...on a HH405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_HUB405 1 /* ...on a HUB405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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#define CONFIG_JSE 1
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/* JSE has a PPC405GPr */
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#define CONFIG_405GP 1
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/* ... which is a 4xxx series */
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#define CONFIG_4x 1
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/* ... with a 33MHz OSC. connected to the SysCLK input */
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#define CONFIG_SYS_CLK_FREQ 33333333
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/* ... with on-chip memory here (4KBytes) */
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#define CONFIG_KAREF 1 /* Board is Kamino Ref Variant */
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#define CONFIG_440GX 1 /* Specifc GX support */
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#define CONFIG_440 1 /* ... PPC440 family */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
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#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
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#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */
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#define CONFIG_METROBOX 1 /* Board is Metrobox */
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#define CONFIG_440GX 1 /* Specifc GX support */
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#define CONFIG_440 1 /* ... PPC440 family */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
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#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
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#define CONFIG_MISC_INIT_R 1 /* Call board misc_init_r */
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* (easy to change)
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***********************************************************/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_MIP405 1 /* ...on a MIP405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_OCRTC 1 /* ...on a OCRTC board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
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* (easy to change)
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_PCI405 1 /* ...on a PCI405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFD0000
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* (easy to change)
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***********************************************************/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_PIP405 1 /* ...on a PIP405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_PLU405 1 /* ...on a PLU405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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*/
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#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_PMC405 1 /* ...on a PMC405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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#define __CONFIG_H
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_PMC405DE 1 /* ...on a PMC405DE board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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*----------------------------------------------------------------------*/
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#define CONFIG_440EPX 1 /* Specific PPC440EPx */
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#define CONFIG_440 1 /* ... PPC440 family */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_TEXT_BASE 0xFFF90000
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_PPCHAMELEONEVB 1 /* ...on a PPChameleonEVB board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFB0000 /* Reserve 320 kB for Monitor */
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_VOH405 1 /* ...on a VOH405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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* (easy to change)
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_VOM405 1 /* ...on a VOM405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC8000
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*/
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#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
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#define CONFIG_4xx 1 /* ...member of PPC405 family */
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#define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */
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#define CONFIG_W7OLMC 1 /* ...specifically an LMC */
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*/
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#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
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#define CONFIG_4xx 1 /* ...member of PPC405 family */
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#define CONFIG_W7O 1 /* ...on a Wave 7 Optics board */
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#define CONFIG_W7OLMG 1 /* ...specifically an LMG */
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#define CONFIG_IDENT_STRING " $Name: $"
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_WUH405 1 /* ...on a WUH405 board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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* High Level Configuration Options
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*----------------------------------------------------------------------*/
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#define CONFIG_ACADIA 1 /* Board is Acadia */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_405EZ 1 /* Specifc 405EZ support*/
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_ALPR 1 /* Board is ebony */
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#define CONFIG_440GX 1 /* Specifc GX support */
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#define CONFIG_440 1 /* ... PPC440 family */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
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#define CONFIG_LAST_STAGE_INIT 1 /* call last_stage_init() */
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#define CONFIG_BAMBOO 1 /* Board is BAMBOO */
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#define CONFIG_440EP 1 /* Specific PPC440EP support */
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#define CONFIG_440 1 /* ... PPC440 family */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_APM821XX 1 /* APM821XX series */
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#define CONFIG_HOSTNAME bluestone
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_440 1
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#ifndef CONFIG_SYS_TEXT_BASE
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*/
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#define CONFIG_405EP 1 /* This is a PPC405 CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_BUBINGA 1 /* ...on a BUBINGA board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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#endif
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#define CONFIG_440 1
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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*/
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#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_CSB272 1 /* on a Cogent CSB272 board */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f() */
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#define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */
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*/
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#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_CSB472 1 /* on a Cogent CSB472 board */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f() */
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#define CONFIG_LAST_STAGE_INIT 1 /* Call last_stage_init() */
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#define __CONFIG_H
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#define CONFIG_405EP 1 /* this is a PPC405 CPU */
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#define CONFIG_4xx 1 /* member of PPC4xx family */
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#define CONFIG_DLVISION_10G 1 /* on a DLVision-10G board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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#define __CONFIG_H
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#define CONFIG_405EP 1 /* this is a PPC405 CPU */
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#define CONFIG_4xx 1 /* member of PPC4xx family */
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#define CONFIG_DLVISION 1 /* on a Neo board */
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#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
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#define CONFIG_EBONY 1 /* Board is ebony */
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#define CONFIG_440GP 1 /* Specifc GP support */
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#define CONFIG_440 1 /* ... PPC440 family */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
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#define CONFIG_440GR 1 /* Specific PPC440GR support */
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#define CONFIG_HOSTNAME gdppc440etx
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#define CONFIG_440 1 /* ... PPC440 family */
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#define CONFIG_4xx 1 /* ... PPC4xx family */
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#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
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#define CONFIG_SYS_TEXT_BASE 0xFFF80000
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@ -16,7 +16,6 @@
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|||
* High Level Configuration Options
|
||||
*/
|
||||
#define CONFIG_ICON 1 /* Board is icon */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_440SPE 1 /* Specifc SPe support */
|
||||
|
||||
|
|
|
@ -30,7 +30,6 @@
|
|||
#define CONFIG_IDENT_STRING " intip 0.06"
|
||||
#endif
|
||||
#define CONFIG_440 1
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
|
||||
#ifndef CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_405EP 1 /* this is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* member of PPC4xx family */
|
||||
#define CONFIG_IO 1 /* on a Io board */
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
|
||||
|
|
|
@ -20,7 +20,6 @@
|
|||
* High Level Configuration Options
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_IO64 1 /* Board is Io64 */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_405EX 1 /* Specifc 405EX support*/
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333 /* ext frequency to pll */
|
||||
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_405EP 1 /* this is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* member of PPC4xx family */
|
||||
#define CONFIG_IOCON 1 /* on a IoCon board */
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
* High Level Configuration Options
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_KATMAI 1 /* Board is Katmai */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_440SPE 1 /* Specifc SPe support */
|
||||
#define CONFIG_440SPE_REVA 1 /* Support old Rev A. */
|
||||
|
|
|
@ -19,7 +19,6 @@
|
|||
* High Level Configuration Options
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_KILAUEA 1 /* Board is Kilauea */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_405EX 1 /* Specifc 405EX support*/
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333 /* ext frequency to pll */
|
||||
|
||||
|
|
|
@ -22,7 +22,6 @@
|
|||
* High Level Configuration Options
|
||||
*/
|
||||
#define CONFIG_440EPX 1 /* Specific PPC440EPx */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333
|
||||
|
||||
#ifdef CONFIG_KORAT_PERMANENT
|
||||
|
|
|
@ -17,7 +17,6 @@
|
|||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_LUAN 1 /* Board is Luan */
|
||||
#define CONFIG_440SP 1 /* Specific PPC440SP support */
|
||||
#define CONFIG_4xx 1 /* PPC4xx family */
|
||||
#define CONFIG_440 1
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
|
||||
|
||||
|
|
|
@ -22,7 +22,6 @@
|
|||
#define CONFIG_LWMON5 1 /* Board is lwmon5 */
|
||||
#define CONFIG_440EPX 1 /* Specific PPC440EPx */
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
|
||||
#ifdef CONFIG_LCD4_LWMON5
|
||||
#define CONFIG_SYS_TEXT_BASE 0x01000000 /* SPL U-Boot TEXT_BASE */
|
||||
|
|
|
@ -19,7 +19,6 @@
|
|||
* High Level Configuration Options
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_MAKALU 1 /* Board is Makalu */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_405EX 1 /* Specifc 405EX support*/
|
||||
#define CONFIG_SYS_CLK_FREQ 33330000 /* ext frequency to pll */
|
||||
|
||||
|
|
|
@ -10,7 +10,6 @@
|
|||
|
||||
|
||||
#define CONFIG_405EP 1 /* this is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* member of PPC4xx family */
|
||||
#define CONFIG_NEO 1 /* on a Neo board */
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
|
||||
|
|
|
@ -26,7 +26,6 @@
|
|||
#define CONFIG_OCOTEA 1 /* Board is ebony */
|
||||
#define CONFIG_440GX 1 /* Specifc GX support */
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
|
||||
|
||||
|
|
|
@ -20,7 +20,6 @@
|
|||
#define CONFIG_P3P440 1 /* Board is P3P440 */
|
||||
#define CONFIG_440GP 1 /* Specifc GP support */
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
|
||||
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
|
||||
|
||||
|
|
|
@ -23,7 +23,6 @@
|
|||
#define CONFIG_PCS440EP 1 /* Board is PCS440EP */
|
||||
#define CONFIG_440EP 1 /* Specific PPC440EP support */
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
|
||||
|
||||
|
|
|
@ -15,7 +15,6 @@
|
|||
* High Level Configuration Options
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_QUAD100HD 1 /* Board is Quad100hd */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_405EP 1 /* Specifc 405EP support*/
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
|
||||
|
|
|
@ -12,7 +12,6 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* High Level Configuration Options
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_440 1 /* ... PPC460 family */
|
||||
#define CONFIG_460SX 1 /* ... PPC460 family */
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
|
||||
|
|
|
@ -17,7 +17,6 @@
|
|||
*/
|
||||
|
||||
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
|
||||
#define CONFIG_SBC405 1 /* ...on a WR SBC405 board */
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
|
||||
|
|
|
@ -43,7 +43,6 @@
|
|||
*/
|
||||
|
||||
#define CONFIG_SC3 1
|
||||
#define CONFIG_4xx 1
|
||||
#define CONFIG_405GP 1
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
|
||||
|
|
|
@ -27,7 +27,6 @@
|
|||
#define CONFIG_HOSTNAME rainier
|
||||
#endif
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
|
||||
#ifndef CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
|
||||
|
|
|
@ -16,7 +16,6 @@
|
|||
*/
|
||||
#define CONFIG_460GT 1 /* Specific PPC460GT */
|
||||
#define CONFIG_440 1
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
|
||||
#ifndef CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
|
||||
|
|
|
@ -13,7 +13,6 @@
|
|||
|
||||
|
||||
#define CONFIG_405EP 1 /* this is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* member of PPC4xx family */
|
||||
#define CONFIG_TAIHU 1 /* on a taihu board */
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
#define CONFIG_TAISHAN 1 /* Board is taishan */
|
||||
#define CONFIG_440GX 1 /* Specifc GX support */
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
*/
|
||||
|
||||
#define CONFIG_405GP 1 /* This is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
|
||||
#define CONFIG_WALNUT 1 /* ...on a WALNUT board */
|
||||
/* ...or on a SYCAMORE board */
|
||||
|
||||
|
|
|
@ -15,7 +15,6 @@
|
|||
|
||||
/* cpu parameter */
|
||||
#define CONFIG_405 1
|
||||
#define CONFIG_4xx 1
|
||||
#define CONFIG_XILINX_405 1
|
||||
|
||||
#include <configs/xilinx-ppc.h>
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
#define __CONFIG_GEN_H
|
||||
|
||||
/*CPU*/
|
||||
#define CONFIG_4xx 1
|
||||
#define CONFIG_440 1
|
||||
#define CONFIG_XILINX_440 1
|
||||
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
#define CONFIG_XPEDITE1000 1
|
||||
#define CONFIG_SYS_BOARD_NAME "XPedite1000"
|
||||
#define CONFIG_SYS_FORM_PMC 1
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_440 1
|
||||
#define CONFIG_440GX 1 /* 440 GX */
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
|
||||
|
|
|
@ -23,7 +23,6 @@
|
|||
#define CONFIG_HOSTNAME yellowstone
|
||||
#endif
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* High Level Configuration Options
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_440 1 /* ... PPC440 family */
|
||||
#define CONFIG_440SPE 1 /* Specifc SPe support */
|
||||
#define CONFIG_440SPE_REVA 1 /* Support old Rev A. */
|
||||
|
|
|
@ -15,7 +15,6 @@
|
|||
* High Level Configuration Options
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_ZEUS 1 /* Board is Zeus */
|
||||
#define CONFIG_4xx 1 /* ... PPC4xx family */
|
||||
#define CONFIG_405EP 1 /* Specifc 405EP support*/
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
|
||||
|
|
Loading…
Reference in New Issue