malta: Set I/O port base early
Set the I/O port base earlier, from board_early_init_f, in preparation for it being used by the serial driver. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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05e342554e
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19a5ef60bb
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@ -146,6 +146,8 @@ int board_early_init_f(void)
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return -1;
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return -1;
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}
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}
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set_io_port_base((ulong)io_base);
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/* setup FDC37M817 super I/O controller */
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/* setup FDC37M817 super I/O controller */
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malta_superio_init(io_base);
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malta_superio_init(io_base);
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@ -179,8 +181,6 @@ void pci_init_board(void)
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switch (malta_sys_con()) {
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switch (malta_sys_con()) {
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case SYSCON_GT64120:
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case SYSCON_GT64120:
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set_io_port_base(CKSEG1ADDR(MALTA_GT_PCIIO_BASE));
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gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE),
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gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE),
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0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
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0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
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0x10000000, 0x10000000, 128 * 1024 * 1024,
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0x10000000, 0x10000000, 128 * 1024 * 1024,
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@ -189,8 +189,6 @@ void pci_init_board(void)
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default:
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default:
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case SYSCON_MSC01:
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case SYSCON_MSC01:
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set_io_port_base(CKSEG1ADDR(MALTA_MSC01_PCIIO_BASE));
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msc01_pci_init((void *)CKSEG1ADDR(MALTA_MSC01_PCI_BASE),
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msc01_pci_init((void *)CKSEG1ADDR(MALTA_MSC01_PCI_BASE),
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0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
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0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE,
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MALTA_MSC01_PCIMEM_MAP,
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MALTA_MSC01_PCIMEM_MAP,
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