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ls102xa: esdhc: Add esdhc support for LS102xA 

For LS1, esdhc is big-endian IP. Accessing the registers
should be in big-endian mode. So we use esdhc_read32()
to read Host controller capabilities register for LS1.

For LS1, when using CMD12, cmdtype need to be set to
ABORT, otherwise, next read command will hang.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
This commit is contained in:
Wang Huan 2014-09-05 13:52:40 +08:00 committed by York Sun
parent c82e9de400
commit 19060bd886
1 changed files with 2 additions and 2 deletions
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4
drivers/mmc/fsl_esdhc.c
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@ -96,7 +96,7 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
else if (cmd->resp_type & MMC_RSP_PRESENT) else if (cmd->resp_type & MMC_RSP_PRESENT)
xfertyp |= XFERTYP_RSPTYP_48; xfertyp |= XFERTYP_RSPTYP_48;
#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) #if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || defined(CONFIG_LS102XA)
if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
xfertyp |= XFERTYP_CMDTYP_ABORT; xfertyp |= XFERTYP_CMDTYP_ABORT;
#endif #endif
@ -561,7 +561,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
memset(&cfg->cfg, 0, sizeof(cfg->cfg)); memset(&cfg->cfg, 0, sizeof(cfg->cfg));
voltage_caps = 0; voltage_caps = 0;
caps = regs->hostcapblt; caps = esdhc_read32(&regs->hostcapblt);
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135
caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |