ARM: tegra: add p2771-0000 board support
P2771-0000 is a P3310 CPU board married to a P2597 I/O board. The combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, Ethernet, USB3 host port, SATA, PCIe, and two GPIO expansion headers. Currently, due to U-Boot's level of support for Tegra186, the only features supported by U-Boot are the console UART and the on-board eMMC. Additional features will be added over time. U-Boot has so far been tested by replacing the kernel image on the device with a U-Boot binary. It is anticipated that U-Boot will eventually replace the CCPLEX bootloader binary, as on previous chips. This hasn't yet been tested. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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Stephen Warren
Tom Warren
parent
c7ba99c8c1
commit
10a03382f0
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@ -47,6 +47,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
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tegra124-jetson-tk1.dtb \
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tegra124-jetson-tk1.dtb \
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tegra124-nyan-big.dtb \
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tegra124-nyan-big.dtb \
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tegra124-venice2.dtb \
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tegra124-venice2.dtb \
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tegra186-p2771-0000.dtb \
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tegra210-e2220-1170.dtb \
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tegra210-e2220-1170.dtb \
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tegra210-p2371-0000.dtb \
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tegra210-p2371-0000.dtb \
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tegra210-p2371-2180.dtb \
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tegra210-p2371-2180.dtb \
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@ -0,0 +1,25 @@
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/dts-v1/;
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#include "tegra186.dtsi"
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/ {
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model = "NVIDIA P2771-0000";
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compatible = "nvidia,p2771-0000", "nvidia,tegra186";
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chosen {
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stdout-path = &uarta;
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};
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aliases {
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sdhci0 = "/sdhci@3460000";
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};
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memory {
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reg = <0x0 0x80000000 0x0 0x60000000>;
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};
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sdhci@3460000 {
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status = "okay";
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bus-width = <8>;
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};
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};
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@ -7,9 +7,19 @@ if TEGRA186
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choice
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choice
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prompt "Tegra186 board select"
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prompt "Tegra186 board select"
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config TARGET_P2771_0000
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bool "NVIDIA Tegra186 P2771-0000 board"
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help
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P2771-0000 is a P3310 CPU board married to a P2597 I/O board. The
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combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB
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micro-B port, Ethernet, USB3 host port, SATA, PCIe, and two GPIO
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expansion headers.
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endchoice
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endchoice
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config SYS_SOC
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config SYS_SOC
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default "tegra186"
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default "tegra186"
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source "board/nvidia/p2771-0000/Kconfig"
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endif
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endif
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@ -0,0 +1,16 @@
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# Copyright (c) 2016, NVIDIA CORPORATION.
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#
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# SPDX-License-Identifier: GPL-2.0
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if TARGET_P2771_0000
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config SYS_BOARD
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default "p2771-0000"
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config SYS_VENDOR
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default "nvidia"
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config SYS_CONFIG_NAME
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default "p2771-0000"
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endif
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@ -0,0 +1,6 @@
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P2771-0000 BOARD
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M: Stephen Warren <swarren@nvidia.com>
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S: Maintained
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F: board/nvidia/p2771-0000/
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F: include/configs/p2771-0000.h
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F: configs/p2771-0000_defconfig
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@ -0,0 +1,5 @@
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# Copyright (c) 2016, NVIDIA CORPORATION.
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#
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# SPDX-License-Identifier: GPL-2.0
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obj-y += p2771-0000.o
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@ -0,0 +1,7 @@
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/*
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* Copyright (c) 2016, NVIDIA CORPORATION
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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@ -0,0 +1,31 @@
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CONFIG_ARM=y
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CONFIG_TEGRA=y
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CONFIG_TEGRA186=y
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CONFIG_TARGET_P2771_0000=y
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CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000"
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CONFIG_OF_SYSTEM_SETUP=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="Tegra186 (P2771-0000) # "
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_FPGA is not set
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CONFIG_CMD_GPIO=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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# CONFIG_CMD_NFS is not set
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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@ -0,0 +1,33 @@
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/*
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* Copyright (c) 2013-2016, NVIDIA CORPORATION.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _P2771_0000_H
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#define _P2771_0000_H
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#include <linux/sizes.h>
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#include "tegra186-common.h"
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/* High-level configuration options */
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#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2771-0000"
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/* SD/MMC */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_TEGRA_MMC
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 2
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#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
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#include "tegra-common-post.h"
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/* Crystal is 38.4MHz. clk_m runs at half that rate */
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#define COUNTER_FREQUENCY 19200000
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#endif
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