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socfpga: Adding DesignWare watchdog support 

To enable the DesignWare watchdog support at SOCFPGA
Cyclone V dev kit.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
This commit is contained in:
Chin Liang See 2014-06-10 01:11:04 -05:00 committed by Albert ARIBAUD
parent d8c67dc6e1
commit 05b884b5cd
2 changed files with 15 additions and 0 deletions
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1
arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
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@ -11,6 +11,7 @@
#define SOCFPGA_UART0_ADDRESS 0xffc02000
#define SOCFPGA_UART1_ADDRESS 0xffc03000
#define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
#define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
#define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000

14
include/configs/socfpga_cyclone5.h
View File

@ -205,6 +205,17 @@
#define CONFIG_ENV_IS_NOWHERE
/*
* L4 Watchdog
*/
#define CONFIG_HW_WATCHDOG
#define CONFIG_HW_WATCHDOG_TIMEOUT_MS 2000
#define CONFIG_DESIGNWARE_WATCHDOG
#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
/* Clocks source frequency to watchdog timer */
#define CONFIG_DW_WDT_CLOCK_KHZ 25000
/*
* SPL "Second Program Loader" aka Initial Software
*/
@ -237,4 +248,7 @@
/* Support for lib/libgeneric.o in SPL binary */
#define CONFIG_SPL_LIBGENERIC_SUPPORT
/* Support for watchdog */
#define CONFIG_SPL_WATCHDOG_SUPPORT
#endif /* __CONFIG_H */