Implement h/w sector protection status synchronization at boot.
The code is provided for, and was tested on, the Yukon/Alaska and PM520 boards only. A bug in flash_real_protect() for the Yukon board was fixed by adding a function that tells if two banks are on one flash chip.
This commit is contained in:
Wolfgang Denk
parent
15f36a5efd
commit
010162eb72
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@ -64,7 +64,6 @@ typedef volatile unsigned char FLASH_PORT_WIDTHV;
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#define FLASH_CYCLE2 0x02aa
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#define WR_BLOCK 0x20
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/*-----------------------------------------------------------------------
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* Functions
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*/
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@ -74,6 +73,9 @@ static int write_data_block (flash_info_t * info, ulong src, ulong dest);
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static int write_word_amd (flash_info_t * info, FPWV * dest, FPW data);
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static void flash_get_offsets (ulong base, flash_info_t * info);
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void inline spin_wheel (void);
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static void flash_sync_real_protect (flash_info_t * info);
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static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
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static unsigned char same_chip_banks (int bank1, int bank2);
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/*-----------------------------------------------------------------------
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*/
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@ -115,6 +117,9 @@ unsigned long flash_init (void)
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break;
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}
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size += flash_info[i].size;
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/* get the h/w and s/w protection status in sync */
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flash_sync_real_protect(&flash_info[i]);
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}
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/* Protect monitor and environment sectors
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@ -167,7 +172,6 @@ static void flash_get_offsets (ulong base, flash_info_t * info)
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = base + (i * PHYS_INTEL_SECT_SIZE);
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info->protect[i] = 0;
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}
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}
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}
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@ -305,6 +309,98 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
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}
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/*
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* This function gets the u-boot flash sector protection status
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* (flash_info_t.protect[]) in sync with the sector protection
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* status stored in hardware.
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*/
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static void flash_sync_real_protect (flash_info_t * info)
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{
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int i;
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F128J3A:
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for (i = 0; i < info->sector_count; ++i) {
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info->protect[i] = intel_sector_protected(info, i);
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}
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break;
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case FLASH_AM040:
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default:
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/* no h/w protect support */
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break;
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}
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}
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/*
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* checks if "sector" in bank "info" is protected. Should work on intel
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* strata flash chips 28FxxxJ3x in 8-bit mode.
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* Returns 1 if sector is protected (or timed-out while trying to read
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* protection status), 0 if it is not.
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*/
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static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
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{
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FPWV *addr;
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FPWV *lock_conf_addr;
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ulong start;
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unsigned char ret;
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/*
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* first, wait for the WSM to be finished. The rationale for
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* waiting for the WSM to become idle for at most
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* CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
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* because of: (1) erase, (2) program or (3) lock bit
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* configuration. So we just wait for the longest timeout of
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* the (1)-(3), i.e. the erase timeout.
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*/
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/* wait at least 35ns (W12) before issuing Read Status Register */
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udelay(1);
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addr = (FPWV *) info->start[sector];
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*addr = (FPW) INTEL_STATUS;
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start = get_timer (0);
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while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
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if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
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*addr = (FPW) INTEL_RESET; /* restore read mode */
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printf("WSM busy too long, can't get prot status\n");
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return 1;
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}
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}
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/* issue the Read Identifier Codes command */
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*addr = (FPW) INTEL_READID;
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/* wait at least 35ns (W12) before reading */
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udelay(1);
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/* Intel example code uses offset of 4 for 8-bit flash */
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lock_conf_addr = (FPWV *) info->start[sector] + 4;
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ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
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/* put flash back in read mode */
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*addr = (FPW) INTEL_RESET;
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return ret;
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}
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/*
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* Checks if "bank1" and "bank2" are on the same chip. Returns 1 if they
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* are and 0 otherwise.
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*/
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static unsigned char same_chip_banks (int bank1, int bank2)
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{
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unsigned char same_chip[CFG_MAX_FLASH_BANKS][CFG_MAX_FLASH_BANKS] = {
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{1, 1, 0, 0},
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{1, 1, 0, 0},
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{0, 0, 1, 1},
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{0, 0, 1, 1}
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};
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return same_chip[bank1][bank2];
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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@ -729,7 +825,9 @@ void inline spin_wheel (void)
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int flash_real_protect (flash_info_t * info, long sector, int prot)
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{
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ulong start;
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int i;
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int i, j;
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int curr_bank;
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int bank;
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int rc = 0;
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FPWV *addr = (FPWV *) (info->start[sector]);
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int flag = disable_interrupts ();
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@ -779,23 +877,54 @@ int flash_real_protect (flash_info_t * info, long sector, int prot)
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* we have to restore lock bits of protected sectors.
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*/
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if (!prot) {
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for (i = 0; i < info->sector_count; i++) {
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if (info->protect[i]) {
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start = get_timer (0);
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addr = (FPWV *) (info->start[i]);
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*addr = INTEL_LOCKBIT; /* Sector lock bit */
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*addr = INTEL_PROTECT; /* set */
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while ((*addr & INTEL_FINISHED) !=
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INTEL_FINISHED) {
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if (get_timer (start) >
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CFG_FLASH_UNLOCK_TOUT) {
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printf ("Flash lock bit operation timed out\n");
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rc = 1;
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break;
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/*
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* re-locking must be done for all banks that belong on one
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* FLASH chip, as all the sectors on the chip were unlocked
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* by INTEL_LOCKBIT/INTEL_CONFIRM commands. (let's hope
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* that banks never span chips, in particular chips which
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* support h/w protection differently).
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*/
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/* find the current bank number */
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curr_bank = CFG_MAX_FLASH_BANKS + 1;
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for (j = 0; j < CFG_MAX_FLASH_BANKS; ++j) {
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if (&flash_info[j] == info) {
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curr_bank = j;
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}
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}
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if (curr_bank == CFG_MAX_FLASH_BANKS + 1) {
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printf("Error: can't determine bank number!\n");
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}
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for (bank = 0; bank < CFG_MAX_FLASH_BANKS; ++bank) {
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if (!same_chip_banks(curr_bank, bank)) {
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continue;
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}
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info = &flash_info[bank];
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for (i = 0; i < info->sector_count; i++) {
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if (info->protect[i]) {
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start = get_timer (0);
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addr = (FPWV *) (info->start[i]);
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*addr = INTEL_LOCKBIT; /* Sector lock bit */
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*addr = INTEL_PROTECT; /* set */
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while ((*addr & INTEL_FINISHED) !=
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INTEL_FINISHED) {
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if (get_timer (start) >
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CFG_FLASH_UNLOCK_TOUT) {
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printf ("Flash lock bit operation timed out\n");
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rc = 1;
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break;
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}
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}
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}
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}
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}
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/*
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* get the s/w sector protection status in sync with the h/w,
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* in case something went wrong during the re-locking.
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*/
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flash_sync_real_protect(info); /* resets flash to read mode */
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}
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if (flag)
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@ -75,6 +75,8 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info);
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static int write_data (flash_info_t *info, ulong dest, FPW data);
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static void flash_get_offsets (ulong base, flash_info_t *info);
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void inline spin_wheel (void);
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static void flash_sync_real_protect (flash_info_t * info);
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static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
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/*-----------------------------------------------------------------------
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*/
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@ -101,6 +103,9 @@ unsigned long flash_init (void)
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break;
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}
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size += flash_info[i].size;
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/* get the h/w and s/w protection status in sync */
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flash_sync_real_protect(&flash_info[i]);
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}
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/* Protect monitor and environment sectors
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@ -138,7 +143,6 @@ static void flash_get_offsets (ulong base, flash_info_t *info)
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
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info->protect[i] = 0;
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}
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}
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}
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@ -270,6 +274,85 @@ static ulong flash_get_size (FPW *addr, flash_info_t *info)
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}
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/*
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* This function gets the u-boot flash sector protection status
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* (flash_info_t.protect[]) in sync with the sector protection
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* status stored in hardware.
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*/
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static void flash_sync_real_protect (flash_info_t * info)
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{
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int i;
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F128J3A:
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case FLASH_28F640J3A:
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case FLASH_28F320J3A:
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for (i = 0; i < info->sector_count; ++i) {
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info->protect[i] = intel_sector_protected(info, i);
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}
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break;
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default:
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/* no h/w protect support */
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break;
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}
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}
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/*
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* checks if "sector" in bank "info" is protected. Should work on intel
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* strata flash chips 28FxxxJ3x in 8-bit mode.
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* Returns 1 if sector is protected (or timed-out while trying to read
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* protection status), 0 if it is not.
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*/
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static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
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{
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FPWV *addr;
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FPWV *lock_conf_addr;
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ulong start;
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unsigned char ret;
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/*
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* first, wait for the WSM to be finished. The rationale for
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* waiting for the WSM to become idle for at most
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* CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
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* because of: (1) erase, (2) program or (3) lock bit
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* configuration. So we just wait for the longest timeout of
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* the (1)-(3), i.e. the erase timeout.
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*/
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/* wait at least 35ns (W12) before issuing Read Status Register */
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udelay(1);
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addr = (FPWV *) info->start[sector];
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*addr = (FPW) INTEL_STATUS;
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start = get_timer (0);
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while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
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if (get_timer (start) > CFG_FLASH_ERASE_TOUT) {
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*addr = (FPW) INTEL_RESET; /* restore read mode */
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printf("WSM busy too long, can't get prot status\n");
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return 1;
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}
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}
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/* issue the Read Identifier Codes command */
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*addr = (FPW) INTEL_READID;
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/* wait at least 35ns (W12) before reading */
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udelay(1);
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/* Intel example code uses offset of 2 for 16 bit flash */
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lock_conf_addr = (FPWV *) info->start[sector] + 2;
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ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
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/* put flash back in read mode */
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*addr = (FPW) INTEL_RESET;
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return ret;
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}
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/*-----------------------------------------------------------------------
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*/
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@ -491,7 +574,7 @@ void inline spin_wheel (void)
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* 0 - OK
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* 1 - Error (timeout, voltage problems, etc.)
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*/
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int flash_real_protect(flash_info_t *info, long sector, int prot)
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int flash_real_protect (flash_info_t *info, long sector, int prot)
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{
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ulong start;
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int i;
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@ -531,6 +614,11 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
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/*
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* Clear lock bit command clears all sectors lock bits, so
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* we have to restore lock bits of protected sectors.
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* WARNING: code below re-locks sectors only for one bank (info).
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* This causes problems on boards where several banks share
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* the same chip, as sectors in othere banks will be unlocked
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* but not re-locked. It works fine on pm520 though, as there
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* is only one chip and one bank.
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*/
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if (!prot)
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{
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@ -553,6 +641,11 @@ int flash_real_protect(flash_info_t *info, long sector, int prot)
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}
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}
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}
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/*
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* get the s/w sector protection status in sync with the h/w,
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* in case something went wrong during the re-locking.
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*/
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flash_sync_real_protect(info); /* resets flash to read mode */
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}
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if (flag)
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