nds32: add header files support for nds32
Add generic header files support for nds32 architecture. Cache, ptregs, data type and other definitions are included. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
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/*
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* Copyright 1995, Russell King.
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* Various bits and pieces copyrights include:
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* Linus Torvalds (test_bit).
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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*
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* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
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*
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* Please note that the code in this file should never be included
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* from user space. Many of these are not implemented in assembler
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* since they would be too costly. Also, they require priviledged
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* instructions (which are not available from user mode) to ensure
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* that they are atomic.
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*/
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#ifndef __ASM_NDS_BITOPS_H
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#define __ASM_NDS_BITOPS_H
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#ifdef __KERNEL__
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#include <asm/system.h>
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#define smp_mb__before_clear_bit() do { } while (0)
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#define smp_mb__after_clear_bit() do { } while (0)
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/*
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* Function prototypes to keep gcc -Wall happy.
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*/
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extern void set_bit(int nr, void *addr);
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static inline void __set_bit(int nr, void *addr)
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{
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int *a = (int *)addr;
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int mask;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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*a |= mask;
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}
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extern void clear_bit(int nr, void *addr);
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static inline void __clear_bit(int nr, void *addr)
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{
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int *a = (int *)addr;
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int mask;
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unsigned long flags;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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local_irq_save(flags);
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*a &= ~mask;
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local_irq_restore(flags);
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}
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extern void change_bit(int nr, void *addr);
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static inline void __change_bit(int nr, void *addr)
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{
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int mask;
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unsigned long *ADDR = (unsigned long *)addr;
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ADDR += nr >> 5;
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mask = 1 << (nr & 31);
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*ADDR ^= mask;
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}
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extern int test_and_set_bit(int nr, void *addr);
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static inline int __test_and_set_bit(int nr, void *addr)
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{
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int mask, retval;
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unsigned int *a = (unsigned int *)addr;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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retval = (mask & *a) != 0;
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*a |= mask;
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return retval;
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}
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extern int test_and_clear_bit(int nr, void *addr);
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static inline int __test_and_clear_bit(int nr, void *addr)
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{
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int mask, retval;
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unsigned int *a = (unsigned int *)addr;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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retval = (mask & *a) != 0;
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*a &= ~mask;
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return retval;
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}
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extern int test_and_change_bit(int nr, void *addr);
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static inline int __test_and_change_bit(int nr, void *addr)
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{
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int mask, retval;
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unsigned int *a = (unsigned int *)addr;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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retval = (mask & *a) != 0;
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*a ^= mask;
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return retval;
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}
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extern int find_first_zero_bit(void *addr, unsigned size);
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extern int find_next_zero_bit(void *addr, int size, int offset);
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/*
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* This routine doesn't need to be atomic.
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*/
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static inline int test_bit(int nr, const void *addr)
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{
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return ((unsigned char *) addr)[nr >> 3] & (1U << (nr & 7));
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}
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/*
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* ffz = Find First Zero in word. Undefined if no zero exists,
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* so code should check against ~0UL first..
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*/
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static inline unsigned long ffz(unsigned long word)
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{
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int k;
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word = ~word;
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k = 31;
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if (word & 0x0000ffff) {
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k -= 16; word <<= 16;
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}
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if (word & 0x00ff0000) {
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k -= 8; word <<= 8;
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}
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if (word & 0x0f000000) {
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k -= 4; word <<= 4;
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}
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if (word & 0x30000000) {
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k -= 2; word <<= 2;
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}
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if (word & 0x40000000)
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k -= 1;
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return k;
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}
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/*
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* ffs: find first bit set. This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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/*
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* redefined in include/linux/bitops.h
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* #define ffs(x) generic_ffs(x)
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*/
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/*
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* hweightN: returns the hamming weight (i.e. the number
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* of bits set) of a N-bit word
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*/
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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#define ext2_set_bit test_and_set_bit
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#define ext2_clear_bit test_and_clear_bit
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#define ext2_test_bit test_bit
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#define ext2_find_first_zero_bit find_first_zero_bit
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#define ext2_find_next_zero_bit find_next_zero_bit
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/* Bitmap functions for the minix filesystem. */
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#define minix_test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
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#define minix_set_bit(nr, addr) set_bit(nr, addr)
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#define minix_test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
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#define minix_test_bit(nr, addr) test_bit(nr, addr)
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#define minix_find_first_zero_bit(addr, size) find_first_zero_bit(addr, size)
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#endif /* __KERNEL__ */
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#endif /* __ASM_NDS_BITOPS_H */
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@ -0,0 +1,36 @@
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/*
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* linux/include/asm-arm/byteorder.h
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* ARM Endian-ness. In little endian mode, the data bus is connected such
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* that byte accesses appear as:
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* 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
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* and word accesses (data or instruction) appear as:
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* d0...d31
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*
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* When in big endian mode, byte accesses appear as:
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* 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
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* and word accesses (data or instruction) appear as:
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* d0...d31
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*/
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#ifndef __ASM_NDS_BYTEORDER_H
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#define __ASM_NDS_BYTEORDER_H
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#include <asm/types.h>
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#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
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# define __BYTEORDER_HAS_U64__
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# define __SWAB_64_THRU_32__
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#endif
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#ifdef __NDSEB__
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#include <linux/byteorder/big_endian.h>
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#else
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#include <linux/byteorder/little_endian.h>
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#endif
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#endif
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/*
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* Copyright (C) 2011 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _ASM_CACHE_H
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#define _ASM_CACHE_H
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/* cache */
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int icache_status(void);
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void icache_enable(void);
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void icache_disable(void);
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int dcache_status(void);
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void dcache_enable(void);
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void dcache_disable(void);
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#define DEFINE_GET_SYS_REG(reg) \
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static inline unsigned long GET_##reg(void) \
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{ \
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unsigned long val; \
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__asm__ volatile ( \
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"mfsr %0, $"#reg : "=&r" (val) : : "memory" \
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); \
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return val; \
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}
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enum cache_t {ICACHE, DCACHE};
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DEFINE_GET_SYS_REG(ICM_CFG);
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DEFINE_GET_SYS_REG(DCM_CFG);
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#define ICM_CFG_OFF_ISZ 6 /* I-cache line size */
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#define ICM_CFG_MSK_ISZ (0x7UL << ICM_CFG_OFF_ISZ)
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#define DCM_CFG_OFF_DSZ 6 /* D-cache line size */
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#define DCM_CFG_MSK_DSZ (0x7UL << DCM_CFG_OFF_DSZ)
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#endif /* _ASM_CACHE_H */
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/*
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* Copyright (C) 2011 Andes Technology Corporation
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* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
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* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef _ASM_CONFIG_H_
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#define _ASM_CONFIG_H_
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#define CONFIG_NEEDS_MANUAL_RELOC
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#endif
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/**************************************************************
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* CAUTION:
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* - do not implement for NDS32 Arch yet.
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* - so far no one uses the macros defined in this head file.
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**************************************************************/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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/*
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* The following data structure is placed in some memory wich is
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* available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
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* some locked parts of the data cache) to allow for a minimum set of
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* global variables during system initialization (until we have set
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* up the memory controller so that we can use RAM).
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*
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* Keep it *SMALL* and remember to set CONFIG_GBL_DATA_SIZE > sizeof(gd_t)
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*/
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typedef struct global_data {
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bd_t *bd;
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unsigned long flags;
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unsigned long baudrate;
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unsigned long have_console; /* serial_init() was called */
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unsigned long reloc_off; /* Relocation Offset */
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unsigned long env_addr; /* Address of Environment struct */
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unsigned long env_valid; /* Checksum of Environment valid? */
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unsigned long fb_base; /* base address of frame buffer */
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unsigned long relocaddr; /* Start address of U-Boot in RAM */
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phys_size_t ram_size; /* RAM size */
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unsigned long mon_len; /* monitor len */
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unsigned long irq_sp; /* irq stack pointer */
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unsigned long start_addr_sp; /* start_addr_stackpointer */
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#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
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unsigned long tlb_addr;
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#endif
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void **jt; /* jump table */
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char env_buf[32]; /* buffer for getenv() before reloc. */
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} gd_t;
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/*
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* Global Data Flags
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*/
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#define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
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#define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
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#define GD_FLG_SILENT 0x00004 /* Silent mode */
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#define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
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#define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
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#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
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#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
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#define GD_FLG_ENV_READY 0x00080 /* Envs imported into hash table */
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#ifdef CONFIG_GLOBAL_DATA_NOT_REG10
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extern volatile gd_t g_gd;
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#define DECLARE_GLOBAL_DATA_PTR static volatile gd_t *gd = &g_gd
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#else
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("$r10")
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#endif
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#endif /* __ASM_GBL_DATA_H */
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@ -0,0 +1,412 @@
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/*
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* linux/include/asm-nds/io.h
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*
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* Copyright (C) 1996-2000 Russell King
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*
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* Copyright (C) 2011 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Modifications:
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* 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
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* constant addresses and variable addresses.
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* 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
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* specific IO header files.
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* 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
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* 04-Apr-1999 PJB Added check_signature.
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* 12-Dec-1999 RMK More cleanups
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* 18-Jun-2000 RMK Removed virt_to_* and friends definitions
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*/
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#ifndef __ASM_NDS_IO_H
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#define __ASM_NDS_IO_H
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/*
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* CAUTION:
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* - do not implement for NDS32 Arch yet.
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* - cmd_pci.c, cmd_scsi.c, Lynxkdi.c, usb.c, usb_storage.c, etc...
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* iinclude asm/io.h
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*/
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <asm/byteorder.h>
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static inline void sync(void)
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{
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}
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/*
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* Given a physical address and a length, return a virtual address
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* that can be used to access the memory range with the caching
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* properties specified by "flags".
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*/
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#define MAP_NOCACHE (0)
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#define MAP_WRCOMBINE (0)
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#define MAP_WRBACK (0)
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#define MAP_WRTHROUGH (0)
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static inline void *
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map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
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{
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return (void *)paddr;
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}
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/*
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* Take down a mapping set up by map_physmem().
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*/
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static inline void unmap_physmem(void *vaddr, unsigned long flags)
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{
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}
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static inline phys_addr_t virt_to_phys(void *vaddr)
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{
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return (phys_addr_t)(vaddr);
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}
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/*
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* Generic virtual read/write. Note that we don't support half-word
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* read/writes. We define __arch_*[bl] here, and leave __arch_*w
|
||||
* to the architecture specific code.
|
||||
*/
|
||||
#define __arch_getb(a) (*(unsigned char *)(a))
|
||||
#define __arch_getw(a) (*(unsigned short *)(a))
|
||||
#define __arch_getl(a) (*(unsigned int *)(a))
|
||||
|
||||
#define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
|
||||
#define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
|
||||
#define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
|
||||
|
||||
extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
|
||||
extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
|
||||
extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
|
||||
|
||||
extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
|
||||
extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
|
||||
extern void __raw_readsl(unsigned int addr, void *data, int longlen);
|
||||
|
||||
#define __raw_writeb(v, a) __arch_putb(v, a)
|
||||
#define __raw_writew(v, a) __arch_putw(v, a)
|
||||
#define __raw_writel(v, a) __arch_putl(v, a)
|
||||
|
||||
#define __raw_readb(a) __arch_getb(a)
|
||||
#define __raw_readw(a) __arch_getw(a)
|
||||
#define __raw_readl(a) __arch_getl(a)
|
||||
|
||||
#define writeb(v, a) __arch_putb(v, a)
|
||||
#define writew(v, a) __arch_putw(v, a)
|
||||
#define writel(v, a) __arch_putl(v, a)
|
||||
|
||||
#define readb(a) __arch_getb(a)
|
||||
#define readw(a) __arch_getw(a)
|
||||
#define readl(a) __arch_getl(a)
|
||||
|
||||
/*
|
||||
* The compiler seems to be incapable of optimising constants
|
||||
* properly. Spell it out to the compiler in some cases.
|
||||
* These are only valid for small values of "off" (< 1<<12)
|
||||
*/
|
||||
#define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
|
||||
#define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
|
||||
#define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
|
||||
|
||||
#define __raw_base_readb(base, off) __arch_base_getb(base, off)
|
||||
#define __raw_base_readw(base, off) __arch_base_getw(base, off)
|
||||
#define __raw_base_readl(base, off) __arch_base_getl(base, off)
|
||||
|
||||
/*
|
||||
* Now, pick up the machine-defined IO definitions
|
||||
* #include <asm/arch/io.h>
|
||||
*/
|
||||
|
||||
/*
|
||||
* IO port access primitives
|
||||
* -------------------------
|
||||
*
|
||||
* The NDS32 doesn't have special IO access instructions just like ARM;
|
||||
* all IO is memory mapped.
|
||||
* Note that these are defined to perform little endian accesses
|
||||
* only. Their primary purpose is to access PCI and ISA peripherals.
|
||||
*
|
||||
* Note that for a big endian machine, this implies that the following
|
||||
* big endian mode connectivity is in place, as described by numerious
|
||||
* ARM documents:
|
||||
*
|
||||
* PCI: D0-D7 D8-D15 D16-D23 D24-D31
|
||||
* ARM: D24-D31 D16-D23 D8-D15 D0-D7
|
||||
*
|
||||
* The machine specific io.h include defines __io to translate an "IO"
|
||||
* address to a memory address.
|
||||
*
|
||||
* Note that we prevent GCC re-ordering or caching values in expressions
|
||||
* by introducing sequence points into the in*() definitions. Note that
|
||||
* __raw_* do not guarantee this behaviour.
|
||||
*
|
||||
* The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
|
||||
*/
|
||||
#ifdef __io
|
||||
#define outb(v, p) __raw_writeb(v, __io(p))
|
||||
#define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
|
||||
#define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
|
||||
|
||||
#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
|
||||
#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
|
||||
#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
|
||||
|
||||
#define outsb(p, d, l) writesb(__io(p), d, l)
|
||||
#define outsw(p, d, l) writesw(__io(p), d, l)
|
||||
#define outsl(p, d, l) writesl(__io(p), d, l)
|
||||
|
||||
#define insb(p, d, l) readsb(__io(p), d, l)
|
||||
#define insw(p, d, l) readsw(__io(p), d, l)
|
||||
#define insl(p, d, l) readsl(__io(p), d, l)
|
||||
|
||||
static inline void readsb(unsigned int *addr, void * data, int bytelen)
|
||||
{
|
||||
unsigned char *ptr = (unsigned char *)addr;
|
||||
unsigned char *ptr2 = (unsigned char *)data;
|
||||
while (bytelen) {
|
||||
*ptr2 = *ptr;
|
||||
ptr2++;
|
||||
bytelen--;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void readsw(unsigned int *addr, void * data, int wordlen)
|
||||
{
|
||||
unsigned short *ptr = (unsigned short *)addr;
|
||||
unsigned short *ptr2 = (unsigned short *)data;
|
||||
while (wordlen) {
|
||||
*ptr2 = *ptr;
|
||||
ptr2++;
|
||||
wordlen--;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void readsl(unsigned int *addr, void * data, int longlen)
|
||||
{
|
||||
unsigned int *ptr = (unsigned int *)addr;
|
||||
unsigned int *ptr2 = (unsigned int *)data;
|
||||
while (longlen) {
|
||||
*ptr2 = *ptr;
|
||||
ptr2++;
|
||||
longlen--;
|
||||
}
|
||||
}
|
||||
static inline void writesb(unsigned int *addr, const void * data, int bytelen)
|
||||
{
|
||||
unsigned char *ptr = (unsigned char *)addr;
|
||||
unsigned char *ptr2 = (unsigned char *)data;
|
||||
while (bytelen) {
|
||||
*ptr = *ptr2;
|
||||
ptr2++;
|
||||
bytelen--;
|
||||
}
|
||||
}
|
||||
static inline void writesw(unsigned int *addr, const void * data, int wordlen)
|
||||
{
|
||||
unsigned short *ptr = (unsigned short *)addr;
|
||||
unsigned short *ptr2 = (unsigned short *)data;
|
||||
while (wordlen) {
|
||||
*ptr = *ptr2;
|
||||
ptr2++;
|
||||
wordlen--;
|
||||
}
|
||||
}
|
||||
static inline void writesl(unsigned int *addr, const void * data, int longlen)
|
||||
{
|
||||
unsigned int *ptr = (unsigned int *)addr;
|
||||
unsigned int *ptr2 = (unsigned int *)data;
|
||||
while (longlen) {
|
||||
*ptr = *ptr2;
|
||||
ptr2++;
|
||||
longlen--;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#define outb_p(val, port) outb((val), (port))
|
||||
#define outw_p(val, port) outw((val), (port))
|
||||
#define outl_p(val, port) outl((val), (port))
|
||||
#define inb_p(port) inb((port))
|
||||
#define inw_p(port) inw((port))
|
||||
#define inl_p(port) inl((port))
|
||||
|
||||
#define outsb_p(port, from, len) outsb(port, from, len)
|
||||
#define outsw_p(port, from, len) outsw(port, from, len)
|
||||
#define outsl_p(port, from, len) outsl(port, from, len)
|
||||
#define insb_p(port, to, len) insb(port, to, len)
|
||||
#define insw_p(port, to, len) insw(port, to, len)
|
||||
#define insl_p(port, to, len) insl(port, to, len)
|
||||
|
||||
/*
|
||||
* ioremap and friends.
|
||||
*
|
||||
* ioremap takes a PCI memory address, as specified in
|
||||
* linux/Documentation/IO-mapping.txt. If you want a
|
||||
* physical address, use __ioremap instead.
|
||||
*/
|
||||
extern void *__ioremap(unsigned long offset, size_t size, unsigned long flags);
|
||||
extern void __iounmap(void *addr);
|
||||
|
||||
/*
|
||||
* Generic ioremap support.
|
||||
*
|
||||
* Define:
|
||||
* iomem_valid_addr(off,size)
|
||||
* iomem_to_phys(off)
|
||||
*/
|
||||
#ifdef iomem_valid_addr
|
||||
#define __arch_ioremap(off, sz, nocache) \
|
||||
({ \
|
||||
unsigned long _off = (off), _size = (sz); \
|
||||
void *_ret = (void *)0; \
|
||||
if (iomem_valid_addr(_off, _size)) \
|
||||
_ret = __ioremap(iomem_to_phys(_off), _size, 0); \
|
||||
_ret; \
|
||||
})
|
||||
|
||||
#define __arch_iounmap __iounmap
|
||||
#endif
|
||||
|
||||
#define ioremap(off, sz) __arch_ioremap((off), (sz), 0)
|
||||
#define ioremap_nocache(off, sz) __arch_ioremap((off), (sz), 1)
|
||||
#define iounmap(_addr) __arch_iounmap(_addr)
|
||||
|
||||
/*
|
||||
* DMA-consistent mapping functions. These allocate/free a region of
|
||||
* uncached, unwrite-buffered mapped memory space for use with DMA
|
||||
* devices. This is the "generic" version. The PCI specific version
|
||||
* is in pci.h
|
||||
*/
|
||||
extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
|
||||
extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
|
||||
extern void consistent_sync(void *vaddr, size_t size, int rw);
|
||||
|
||||
/*
|
||||
* String version of IO memory access ops:
|
||||
*/
|
||||
extern void _memcpy_fromio(void *, unsigned long, size_t);
|
||||
extern void _memcpy_toio(unsigned long, const void *, size_t);
|
||||
extern void _memset_io(unsigned long, int, size_t);
|
||||
|
||||
extern void __readwrite_bug(const char *fn);
|
||||
|
||||
/*
|
||||
* If this architecture has PCI memory IO, then define the read/write
|
||||
* macros. These should only be used with the cookie passed from
|
||||
* ioremap.
|
||||
*/
|
||||
#ifdef __mem_pci
|
||||
|
||||
#define readb(c) ({ unsigned int __v = \
|
||||
__raw_readb(__mem_pci(c)); __v; })
|
||||
#define readw(c) ({ unsigned int __v = \
|
||||
le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
|
||||
#define readl(c) ({ unsigned int __v = \
|
||||
le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
|
||||
|
||||
#define writeb(v, c) __raw_writeb(v, __mem_pci(c))
|
||||
#define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
|
||||
#define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
|
||||
|
||||
#define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
|
||||
#define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
|
||||
#define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
|
||||
|
||||
#define eth_io_copy_and_sum(s, c, l, b) \
|
||||
eth_copy_and_sum((s), __mem_pci(c), (l), (b))
|
||||
|
||||
static inline int
|
||||
check_signature(unsigned long io_addr, const unsigned char *signature,
|
||||
int length)
|
||||
{
|
||||
int retval = 0;
|
||||
do {
|
||||
if (readb(io_addr) != *signature)
|
||||
goto out;
|
||||
io_addr++;
|
||||
signature++;
|
||||
length--;
|
||||
} while (length);
|
||||
retval = 1;
|
||||
out:
|
||||
return retval;
|
||||
}
|
||||
|
||||
#elif !defined(readb)
|
||||
|
||||
#define readb(addr) (__readwrite_bug("readb"), 0)
|
||||
#define readw(addr) (__readwrite_bug("readw"), 0)
|
||||
#define readl(addr) (__readwrite_bug("readl"), 0)
|
||||
#define writeb(v, addr) __readwrite_bug("writeb")
|
||||
#define writew(v, addr) __readwrite_bug("writew")
|
||||
#define writel(v, addr) __readwrite_bug("writel")
|
||||
|
||||
#define eth_io_copy_and_sum(a, b, c, d) __readwrite_bug("eth_io_copy_and_sum")
|
||||
|
||||
#define check_signature(io, sig, len) (0)
|
||||
|
||||
#endif /* __mem_pci */
|
||||
|
||||
/*
|
||||
* If this architecture has ISA IO, then define the isa_read/isa_write
|
||||
* macros.
|
||||
*/
|
||||
#ifdef __mem_isa
|
||||
|
||||
#define isa_readb(addr) __raw_readb(__mem_isa(addr))
|
||||
#define isa_readw(addr) __raw_readw(__mem_isa(addr))
|
||||
#define isa_readl(addr) __raw_readl(__mem_isa(addr))
|
||||
#define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr))
|
||||
#define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr))
|
||||
#define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr))
|
||||
#define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c))
|
||||
#define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c))
|
||||
#define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c))
|
||||
|
||||
#define isa_eth_io_copy_and_sum(a, b, c, d) \
|
||||
eth_copy_and_sum((a), __mem_isa(b), (c), (d))
|
||||
|
||||
static inline int
|
||||
isa_check_signature(unsigned long io_addr, const unsigned char *signature,
|
||||
int length)
|
||||
{
|
||||
int retval = 0;
|
||||
do {
|
||||
if (isa_readb(io_addr) != *signature)
|
||||
goto out;
|
||||
io_addr++;
|
||||
signature++;
|
||||
length--;
|
||||
} while (length);
|
||||
retval = 1;
|
||||
out:
|
||||
return retval;
|
||||
}
|
||||
|
||||
#else /* __mem_isa */
|
||||
|
||||
#define isa_readb(addr) (__readwrite_bug("isa_readb"), 0)
|
||||
#define isa_readw(addr) (__readwrite_bug("isa_readw"), 0)
|
||||
#define isa_readl(addr) (__readwrite_bug("isa_readl"), 0)
|
||||
#define isa_writeb(val, addr) __readwrite_bug("isa_writeb")
|
||||
#define isa_writew(val, addr) __readwrite_bug("isa_writew")
|
||||
#define isa_writel(val, addr) __readwrite_bug("isa_writel")
|
||||
#define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io")
|
||||
#define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio")
|
||||
#define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio")
|
||||
|
||||
#define isa_eth_io_copy_and_sum(a, b, c, d) \
|
||||
__readwrite_bug("isa_eth_io_copy_and_sum")
|
||||
|
||||
#define isa_check_signature(io, sig, len) (0)
|
||||
|
||||
#endif /* __mem_isa */
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_NDS_IO_H */
|
|
@ -0,0 +1,29 @@
|
|||
/*
|
||||
* This was automagically generated from arch/nds/tools/mach-types!
|
||||
* Do NOT edit
|
||||
*/
|
||||
|
||||
#ifndef __ASM_NDS32_MACH_TYPE_H
|
||||
#define __ASM_NDS32_MACH_TYPE_H
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/* The type of machine we're running on */
|
||||
extern unsigned int __machine_arch_type;
|
||||
#endif
|
||||
|
||||
/* see arch/arm/kernel/arch.c for a description of these */
|
||||
#define MACH_TYPE_ADPAG101 0
|
||||
|
||||
#ifdef CONFIG_ARCH_ADPAG101
|
||||
# ifdef machine_arch_type
|
||||
# undef machine_arch_type
|
||||
# define machine_arch_type __machine_arch_type
|
||||
# else
|
||||
# define machine_arch_type MACH_TYPE_ADPAG101
|
||||
# endif
|
||||
# define machine_is_adpag101() (machine_arch_type == MACH_TYPE_ADPAG101)
|
||||
#else
|
||||
# define machine_is_adpag101() (0)
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_NDS32_MACH_TYPE_H */
|
|
@ -0,0 +1,96 @@
|
|||
/*
|
||||
* include/asm-nds32/macro.h
|
||||
*
|
||||
* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __ASM_NDS_MACRO_H
|
||||
#define __ASM_NDS_MACRO_H
|
||||
#ifdef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* These macros provide a convenient way to write 8, 16 and 32 bit data
|
||||
* to an "immediate address (address used by periphal)" only.
|
||||
* Registers r4 and r5 are used, any data in these registers are
|
||||
* overwritten by the macros.
|
||||
* The macros are valid for any NDS32 architecture, they do not implement
|
||||
* any memory barriers so caution is recommended when using these when the
|
||||
* caches are enabled or on a multi-core system.
|
||||
*/
|
||||
|
||||
.macro write32, addr, data
|
||||
li $r4, addr
|
||||
li $r5, data
|
||||
swi $r5, [$r4]
|
||||
.endm
|
||||
|
||||
.macro write16, addr, data
|
||||
li $r4, addr
|
||||
li $r5, data
|
||||
shi $r5, [$r4]
|
||||
.endm
|
||||
|
||||
.macro write8, addr, data
|
||||
li $r4, addr
|
||||
li $r5, data
|
||||
sbi $r5, [$r4]
|
||||
.endm
|
||||
|
||||
/*
|
||||
* This macro read a value from a register, then do OR operation
|
||||
* (set bit fields) to the value, and then store it back to the register.
|
||||
* Note: Instruction 'ori' supports immediate value up to 15 bits.
|
||||
*/
|
||||
.macro setbf32, addr, data
|
||||
li $r4, addr
|
||||
lwi $r5, [$r4]
|
||||
li $r6, data
|
||||
or $r5, $r5, $r6
|
||||
swi $r5, [$r4]
|
||||
.endm
|
||||
|
||||
.macro setbf15, addr, data
|
||||
li $r4, addr
|
||||
lwi $r5, [$r4]
|
||||
ori $r5, $r5, data
|
||||
swi $r5, [$r4]
|
||||
.endm
|
||||
|
||||
/*
|
||||
* This macro generates a loop that can be used for delays in the code.
|
||||
* Register r4 is used, any data in this register is overwritten by the
|
||||
* macro.
|
||||
* The macro is valid for any NDS32 architeture. The actual time spent in the
|
||||
* loop will vary from CPU to CPU though.
|
||||
*/
|
||||
|
||||
.macro wait_timer, time
|
||||
li $r4, time
|
||||
1:
|
||||
nop
|
||||
addi $r4, $r4, -1
|
||||
bnez $r4, 1b
|
||||
.endm
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ASM_ARM_MACRO_H */
|
|
@ -0,0 +1,84 @@
|
|||
/*
|
||||
* linux/include/asm-arm/posix_types.h
|
||||
*
|
||||
* Copyright (C) 1996-1998 Russell King.
|
||||
*
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
|
||||
* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Changelog:
|
||||
* 27-06-1996 RMK Created
|
||||
* 05-03-2010 Modified for arch NDS32
|
||||
*/
|
||||
#ifndef __ARCH_NDS_POSIX_TYPES_H
|
||||
#define __ARCH_NDS_POSIX_TYPES_H
|
||||
|
||||
/*
|
||||
* This file is generally used by user-level software, so you need to
|
||||
* be a little careful about namespace pollution etc. Also, we cannot
|
||||
* assume GCC is being used.
|
||||
*/
|
||||
|
||||
typedef unsigned short __kernel_dev_t;
|
||||
typedef unsigned long __kernel_ino_t;
|
||||
typedef unsigned short __kernel_mode_t;
|
||||
typedef unsigned short __kernel_nlink_t;
|
||||
typedef long __kernel_off_t;
|
||||
typedef int __kernel_pid_t;
|
||||
typedef unsigned short __kernel_ipc_pid_t;
|
||||
typedef unsigned short __kernel_uid_t;
|
||||
typedef unsigned short __kernel_gid_t;
|
||||
typedef unsigned int __kernel_size_t;
|
||||
typedef int __kernel_ssize_t;
|
||||
typedef int __kernel_ptrdiff_t;
|
||||
typedef long __kernel_time_t;
|
||||
typedef long __kernel_suseconds_t;
|
||||
typedef long __kernel_clock_t;
|
||||
typedef int __kernel_daddr_t;
|
||||
typedef char *__kernel_caddr_t;
|
||||
typedef unsigned short __kernel_uid16_t;
|
||||
typedef unsigned short __kernel_gid16_t;
|
||||
typedef unsigned int __kernel_uid32_t;
|
||||
typedef unsigned int __kernel_gid32_t;
|
||||
|
||||
typedef unsigned short __kernel_old_uid_t;
|
||||
typedef unsigned short __kernel_old_gid_t;
|
||||
|
||||
#ifdef __GNUC__
|
||||
typedef long long __kernel_loff_t;
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
#if defined(__KERNEL__) || defined(__USE_ALL)
|
||||
int val[2];
|
||||
#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
|
||||
int __val[2];
|
||||
#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
|
||||
} __kernel_fsid_t;
|
||||
|
||||
#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
|
||||
|
||||
#undef __FD_SET
|
||||
#define __FD_SET(fd, fdsetp) \
|
||||
(((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31)))
|
||||
|
||||
#undef __FD_CLR
|
||||
#define __FD_CLR(fd, fdsetp) \
|
||||
(((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31)))
|
||||
|
||||
#undef __FD_ISSET
|
||||
#define __FD_ISSET(fd, fdsetp) \
|
||||
((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0)
|
||||
|
||||
#undef __FD_ZERO
|
||||
#define __FD_ZERO(fdsetp) \
|
||||
(memset(fdsetp, 0, sizeof(*(fd_set *) fdsetp)))
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_NDS_POSIX_TYPES_H */
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* linux/include/asm-arm/processor.h
|
||||
*
|
||||
* Copyright (C) 1995-2002 Russell King
|
||||
*
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
|
||||
* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_NDS_PROCESSOR_H
|
||||
#define __ASM_NDS_PROCESSOR_H
|
||||
|
||||
/**************************************************************
|
||||
* CAUTION:
|
||||
* - do not implement for NDS32 Arch yet.
|
||||
* - so far some files include /asm/processor.h, but
|
||||
* no one uses the macros defined in this head file.
|
||||
**************************************************************/
|
||||
|
||||
#endif /* __ASM_ARM_PROCESSOR_H */
|
|
@ -0,0 +1,88 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
|
||||
* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __ASM_NDS_PTRACE_H
|
||||
#define __ASM_NDS_PTRACE_H
|
||||
|
||||
#define USR_MODE 0x00
|
||||
#define SU_MODE 0x01
|
||||
#define HV_MODE 0x10
|
||||
#define MODE_MASK (0x03<<3)
|
||||
#define GIE_BIT 0x01
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/* this struct defines the way the registers are stored on the
|
||||
stack during a system call. */
|
||||
|
||||
#define NDS32_REG long
|
||||
|
||||
struct pt_regs {
|
||||
NDS32_REG ir0;
|
||||
NDS32_REG ipsw;
|
||||
NDS32_REG ipc;
|
||||
NDS32_REG sp;
|
||||
NDS32_REG orig_r0;
|
||||
NDS32_REG pipsw;
|
||||
NDS32_REG pipc;
|
||||
NDS32_REG pp0;
|
||||
NDS32_REG pp1;
|
||||
NDS32_REG d0hi;
|
||||
NDS32_REG d0lo;
|
||||
NDS32_REG d1hi;
|
||||
NDS32_REG d1lo;
|
||||
NDS32_REG r[26]; /* r0 - r25 */
|
||||
NDS32_REG fp; /* r28 */
|
||||
NDS32_REG gp; /* r29 */
|
||||
NDS32_REG lp; /* r30 */
|
||||
NDS32_REG fucop_ctl;
|
||||
NDS32_REG osp;
|
||||
};
|
||||
|
||||
#define processor_mode(regs) \
|
||||
(((regs)->ipsw & MODE_MASK) >> 3)
|
||||
|
||||
#define interrupts_enabled(regs) \
|
||||
((regs)->ipsw & GIE_BIT)
|
||||
|
||||
/*
|
||||
* Offsets used by 'ptrace' system call interface.
|
||||
* These can't be changed without breaking binary compatibility
|
||||
* with MkLinux, etc.
|
||||
*/
|
||||
#define PT_R0 0
|
||||
#define PT_R1 1
|
||||
#define PT_R2 2
|
||||
#define PT_R3 3
|
||||
#define PT_R4 4
|
||||
#define PT_R5 5
|
||||
#define PT_R6 6
|
||||
#define PT_R7 7
|
||||
#define PT_R8 8
|
||||
#define PT_R9 9
|
||||
#define PT_R10 10
|
||||
#define PT_R11 11
|
||||
#define PT_R12 12
|
||||
#define PT_R13 13
|
||||
#define PT_R14 14
|
||||
#define PT_R15 15
|
||||
#define PT_R16 16
|
||||
#define PT_R17 17
|
||||
#define PT_R18 18
|
||||
#define PT_R19 19
|
||||
#define PT_R20 20
|
||||
#define PT_R21 21
|
||||
#define PT_R22 22
|
||||
#define PT_R23 23
|
||||
#define PT_R24 24
|
||||
#define PT_R25 25
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __ASM_NDS_PTRACE_H */
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
|
||||
* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_NDS_STRING_H
|
||||
#define __ASM_NDS_STRING_H
|
||||
|
||||
/*
|
||||
* We don't do inline string functions, since the
|
||||
* optimised inline asm versions are not small.
|
||||
*/
|
||||
|
||||
#undef __HAVE_ARCH_STRRCHR
|
||||
extern char *strrchr(const char *s, int c);
|
||||
|
||||
#undef __HAVE_ARCH_STRCHR
|
||||
extern char *strchr(const char *s, int c);
|
||||
|
||||
#undef __HAVE_ARCH_MEMCPY
|
||||
extern void *memcpy(void *, const void *, __kernel_size_t);
|
||||
|
||||
#undef __HAVE_ARCH_MEMMOVE
|
||||
extern void *memmove(void *, const void *, __kernel_size_t);
|
||||
|
||||
#undef __HAVE_ARCH_MEMCHR
|
||||
extern void *memchr(const void *, int, __kernel_size_t);
|
||||
|
||||
#undef __HAVE_ARCH_MEMZERO
|
||||
#undef __HAVE_ARCH_MEMSET
|
||||
extern void *memset(void *, int, __kernel_size_t);
|
||||
|
||||
#ifdef CONFIG_MARCO_MEMSET
|
||||
extern void __memzero(void *ptr, __kernel_size_t n);
|
||||
|
||||
#define memset(p, v, n) \
|
||||
({ \
|
||||
if ((n) != 0) { \
|
||||
if (__builtin_constant_p((v)) && (v) == 0) \
|
||||
__memzero((p), (n)); \
|
||||
else \
|
||||
memset((p), (v), (n)); \
|
||||
} \
|
||||
(p); \
|
||||
})
|
||||
|
||||
#define memzero(p, n) ({ if ((n) != 0) __memzero((p), (n)); (p); })
|
||||
#else
|
||||
extern void memzero(void *ptr, __kernel_size_t n);
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_NDS_STRING_H */
|
|
@ -0,0 +1,88 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef __ASM_NDS_SYSTEM_H
|
||||
#define __ASM_NDS_SYSTEM_H
|
||||
|
||||
/*
|
||||
* Interrupt configuring macros.
|
||||
*/
|
||||
|
||||
extern int irq_flags;
|
||||
|
||||
#define local_irq_enable() \
|
||||
__asm__ __volatile__ ( \
|
||||
"mfsr %0, $psw\n\t" \
|
||||
"andi %0, %0, 0x1\n\t" \
|
||||
"setgie.e\n\t" \
|
||||
: \
|
||||
: "r" (irq_flags) \
|
||||
)
|
||||
|
||||
#define local_irq_disable() \
|
||||
do { \
|
||||
int __tmp_dummy; \
|
||||
__asm__ __volatile__ ( \
|
||||
"mfsr %0, $psw\n\t" \
|
||||
"andi %0, %0, 0x1\n\t" \
|
||||
"setgie.d\n\t" \
|
||||
"dsb\n\t" \
|
||||
: "=r" (__tmp_dummy) \
|
||||
); \
|
||||
} while (0)
|
||||
|
||||
#define local_irq_save(x) \
|
||||
__asm__ __volatile__ ( \
|
||||
"mfsr %0, $psw\n\t" \
|
||||
"andi %0, %0, 0x1\n\t" \
|
||||
"setgie.d\n\t" \
|
||||
"dsb\n\t" \
|
||||
: "=&r" (x) \
|
||||
)
|
||||
|
||||
#define local_save_flags(x) \
|
||||
__asm__ __volatile__ ( \
|
||||
"mfsr %0, $psw\n\t" \
|
||||
"andi %0, %0, 0x1\n\t" \
|
||||
"setgie.e\n\t" \
|
||||
"setgie.d\n\t" \
|
||||
: "=r" (x) \
|
||||
)
|
||||
|
||||
#define irqs_enabled_from_flags(x) ((x) != 0x1f)
|
||||
|
||||
#define local_irq_restore(x) \
|
||||
do { \
|
||||
if (irqs_enabled_from_flags(x)) \
|
||||
local_irq_enable(); \
|
||||
} while (0)
|
||||
|
||||
/*
|
||||
* Force strict CPU ordering.
|
||||
*/
|
||||
#define nop() asm volatile ("nop;\n\t" : : )
|
||||
#define mb() asm volatile ("" : : : "memory")
|
||||
#define rmb() asm volatile ("" : : : "memory")
|
||||
#define wmb() asm volatile ("" : : : "memory")
|
||||
|
||||
#endif /* __ASM_NDS_SYSTEM_H */
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
|
||||
* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_NDS_TYPES_H
|
||||
#define __ASM_NDS_TYPES_H
|
||||
|
||||
typedef unsigned short umode_t;
|
||||
|
||||
/*
|
||||
* __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
|
||||
* header files exported to user space
|
||||
*/
|
||||
|
||||
typedef __signed__ char __s8;
|
||||
typedef unsigned char __u8;
|
||||
|
||||
typedef __signed__ short __s16;
|
||||
typedef unsigned short __u16;
|
||||
|
||||
typedef __signed__ int __s32;
|
||||
typedef unsigned int __u32;
|
||||
|
||||
#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
|
||||
typedef __signed__ long long __s64;
|
||||
typedef unsigned long long __u64;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These aren't exported outside the kernel to avoid name space clashes
|
||||
*/
|
||||
#ifdef __KERNEL__
|
||||
|
||||
typedef signed char s8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
typedef signed short s16;
|
||||
typedef unsigned short u16;
|
||||
|
||||
typedef signed int s32;
|
||||
typedef unsigned int u32;
|
||||
|
||||
typedef signed long long s64;
|
||||
typedef unsigned long long u64;
|
||||
|
||||
#define BITS_PER_LONG 32
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
typedef u32 dma_addr_t;
|
||||
|
||||
typedef unsigned long phys_addr_t;
|
||||
typedef unsigned long phys_size_t;
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
|
||||
* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef _U_BOOT_NDS32_H_
|
||||
#define _U_BOOT_NDS32_H_ 1
|
||||
|
||||
/* for the following variables, see start.S */
|
||||
extern ulong __bss_start; /* BSS start relative to _start */
|
||||
extern ulong __bss_end__; /* BSS end relative to _start */
|
||||
extern ulong _end; /* end of image relative to _start */
|
||||
extern ulong _start; /* start of image relative to _start */
|
||||
extern ulong _TEXT_BASE; /* code start */
|
||||
extern ulong IRQ_STACK_START; /* top of IRQ stack */
|
||||
extern ulong FIQ_STACK_START; /* top of FIQ stack */
|
||||
|
||||
/* cpu/.../cpu.c */
|
||||
int cleanup_before_linux(void);
|
||||
|
||||
/* board/.../... */
|
||||
int board_init(void);
|
||||
int dram_init(void);
|
||||
|
||||
/* cpu/.../interrupt.c */
|
||||
void reset_timer_masked(void);
|
||||
|
||||
#endif /* _U_BOOT_NDS32_H_ */
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* Copyright (C) 2011 Andes Technology Corporation
|
||||
* Copyright (C) 2010 Shawn Lin (nobuhiro@andestech.com)
|
||||
* Copyright (C) 2011 Macpaul Lin (macpaul@andestech.com)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*
|
||||
********************************************************************
|
||||
* NOTE: This header file defines an interface to U-Boot. Including
|
||||
* this (unmodified) header file in another file is considered normal
|
||||
* use of U-Boot, and does *not* fall under the heading of "derived
|
||||
* work".
|
||||
********************************************************************
|
||||
*/
|
||||
|
||||
#ifndef _U_BOOT_H_
|
||||
#define _U_BOOT_H_ 1
|
||||
|
||||
#include <environment.h>
|
||||
|
||||
typedef struct bd_info {
|
||||
int bi_baudrate; /* serial console baudrate */
|
||||
unsigned long bi_ip_addr; /* IP Address */
|
||||
unsigned char bi_enetaddr[6]; /* Ethernet adress */
|
||||
unsigned long bi_arch_number; /* unique id for this board */
|
||||
unsigned long bi_boot_params; /* where this board expects params */
|
||||
unsigned long bi_memstart; /* start of DRAM memory */
|
||||
unsigned long bi_memsize; /* size of DRAM memory in bytes */
|
||||
unsigned long bi_flashstart; /* start of FLASH memory */
|
||||
unsigned long bi_flashsize; /* size of FLASH memory */
|
||||
unsigned long bi_flashoffset; /* reserved area for startup monitor */
|
||||
|
||||
struct /* RAM configuration */
|
||||
{
|
||||
unsigned long start;
|
||||
unsigned long size;
|
||||
} bi_dram[CONFIG_NR_DRAM_BANKS];
|
||||
} bd_t;
|
||||
|
||||
/* For image.h:image_check_target_arch() */
|
||||
#define IH_ARCH_DEFAULT IH_ARCH_NDS32
|
||||
|
||||
#endif /* _U_BOOT_H_ */
|
|
@ -0,0 +1 @@
|
|||
#include <asm-generic/unaligned.h>
|
Loading…
Reference in New Issue