2012-07-31 08:59:25 +00:00
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/*
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* Copyright (C) 2012 Linaro Limited
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* Mathieu Poirier <mathieu.poirier@linaro.org>
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*
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* Based on original code from Joakim Axelsson at ST-Ericsson
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* (C) Copyright 2010 ST-Ericsson
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/prcmu.h>
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2012-07-31 08:59:26 +00:00
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#include <asm/arch/clock.h>
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2012-07-31 08:59:29 +00:00
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#include <asm/arch/hardware.h>
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#include <asm/arch/hardware.h>
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#define CPUID_DB8500V1 0x411fc091
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#define ASICID_DB8500V11 0x008500A1
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static unsigned int read_asicid(void)
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{
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unsigned int *address = (void *)U8500_BOOTROM_BASE
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+ U8500_BOOTROM_ASIC_ID_OFFSET;
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return readl(address);
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}
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static int cpu_is_u8500v11(void)
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{
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return read_asicid() == ASICID_DB8500V11;
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}
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2012-07-31 08:59:25 +00:00
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#ifdef CONFIG_ARCH_CPU_INIT
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/*
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* SOC specific cpu init
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*/
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int arch_cpu_init(void)
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{
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db8500_prcmu_init();
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2012-07-31 08:59:26 +00:00
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db8500_clocks_init();
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2012-07-31 08:59:25 +00:00
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return 0;
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}
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#endif /* CONFIG_ARCH_CPU_INIT */
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2012-07-31 08:59:29 +00:00
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#ifdef CONFIG_MMC
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#define LDO_VAUX3_MASK 0x3
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#define LDO_VAUX3_ENABLE 0x1
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#define VAUX3_VOLTAGE_2_9V 0xd
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#define AB8500_REGU_CTRL2 0x4
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#define AB8500_REGU_VRF1VAUX3_REGU_REG 0x040A
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#define AB8500_REGU_VRF1VAUX3_SEL_REG 0x0421
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int u8500_mmc_power_init(void)
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{
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int ret;
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int val;
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if (!cpu_is_u8500v11())
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return 0;
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/*
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* On v1.1 HREF boards (HREF+), Vaux3 needs to be enabled for the SD
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* card to work. This is done by enabling the regulators in the AB8500
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* via PRCMU I2C transactions.
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*
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* This code is derived from the handling of AB8500_LDO_VAUX3 in
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* ab8500_ldo_enable() and ab8500_ldo_disable() in Linux.
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*
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* Turn off and delay is required to have it work across soft reboots.
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*/
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ret = prcmu_i2c_read(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG);
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if (ret < 0)
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goto out;
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val = ret;
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/* Turn off */
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ret = prcmu_i2c_write(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG,
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val & ~LDO_VAUX3_MASK);
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if (ret < 0)
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goto out;
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udelay(10 * 1000);
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/* Set the voltage to 2.9V */
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ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
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AB8500_REGU_VRF1VAUX3_SEL_REG,
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VAUX3_VOLTAGE_2_9V);
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if (ret < 0)
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goto out;
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val = val & ~LDO_VAUX3_MASK;
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val = val | LDO_VAUX3_ENABLE;
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/* Turn on the supply */
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ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
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AB8500_REGU_VRF1VAUX3_REGU_REG, val);
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out:
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return ret;
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}
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#endif /* CONFIG_MMC */
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