153 lines
5.0 KiB
HTML
153 lines
5.0 KiB
HTML
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<title>Using as: LM32-Regs</title>
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="LM32-Syntax.html#LM32-Syntax" rel="up" title="LM32 Syntax">
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<link href="LM32_002dModifiers.html#LM32_002dModifiers" rel="next" title="LM32-Modifiers">
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="LM32_002dRegs"></a>
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<div class="header">
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<p>
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Next: <a href="LM32_002dModifiers.html#LM32_002dModifiers" accesskey="n" rel="next">LM32-Modifiers</a>, Up: <a href="LM32-Syntax.html#LM32-Syntax" accesskey="u" rel="up">LM32 Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Register-Names-9"></a>
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<h4 class="subsubsection">9.20.2.1 Register Names</h4>
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<a name="index-LM32-register-names"></a>
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<a name="index-register-names_002c-LM32"></a>
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<p>LM32 has 32 x 32-bit general purpose registers ‘<samp>r0</samp>’,
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‘<samp>r1</samp>’, ... ‘<samp>r31</samp>’.
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</p>
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<p>The following aliases are defined: ‘<samp>gp</samp>’ - ‘<samp>r26</samp>’,
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‘<samp>fp</samp>’ - ‘<samp>r27</samp>’, ‘<samp>sp</samp>’ - ‘<samp>r28</samp>’,
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‘<samp>ra</samp>’ - ‘<samp>r29</samp>’, ‘<samp>ea</samp>’ - ‘<samp>r30</samp>’,
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‘<samp>ba</samp>’ - ‘<samp>r31</samp>’.
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</p>
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<p>LM32 has the following Control and Status Registers (CSRs).
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</p>
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<dl compact="compact">
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<dt><code>IE</code></dt>
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<dd><p>Interrupt enable.
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</p></dd>
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<dt><code>IM</code></dt>
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<dd><p>Interrupt mask.
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</p></dd>
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<dt><code>IP</code></dt>
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<dd><p>Interrupt pending.
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</p></dd>
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<dt><code>ICC</code></dt>
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<dd><p>Instruction cache control.
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</p></dd>
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<dt><code>DCC</code></dt>
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<dd><p>Data cache control.
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</p></dd>
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<dt><code>CC</code></dt>
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<dd><p>Cycle counter.
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</p></dd>
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<dt><code>CFG</code></dt>
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<dd><p>Configuration.
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</p></dd>
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<dt><code>EBA</code></dt>
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<dd><p>Exception base address.
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</p></dd>
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<dt><code>DC</code></dt>
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<dd><p>Debug control.
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</p></dd>
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<dt><code>DEBA</code></dt>
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<dd><p>Debug exception base address.
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</p></dd>
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<dt><code>JTX</code></dt>
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<dd><p>JTAG transmit.
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</p></dd>
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<dt><code>JRX</code></dt>
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<dd><p>JTAG receive.
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</p></dd>
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<dt><code>BP0</code></dt>
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<dd><p>Breakpoint 0.
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</p></dd>
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<dt><code>BP1</code></dt>
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<dd><p>Breakpoint 1.
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</p></dd>
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<dt><code>BP2</code></dt>
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<dd><p>Breakpoint 2.
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</p></dd>
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<dt><code>BP3</code></dt>
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<dd><p>Breakpoint 3.
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</p></dd>
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<dt><code>WP0</code></dt>
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<dd><p>Watchpoint 0.
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</p></dd>
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<dt><code>WP1</code></dt>
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<dd><p>Watchpoint 1.
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</p></dd>
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<dt><code>WP2</code></dt>
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<dd><p>Watchpoint 2.
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</p></dd>
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<dt><code>WP3</code></dt>
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<dd><p>Watchpoint 3.
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</p></dd>
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</dl>
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</body>
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