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234 lines
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<title>Using as: AVR Opcodes</title>
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<a name="AVR-Opcodes"></a>
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<div class="header">
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<p>
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Previous: <a href="AVR-Syntax.html#AVR-Syntax" accesskey="p" rel="prev">AVR Syntax</a>, Up: <a href="AVR_002dDependent.html#AVR_002dDependent" accesskey="u" rel="up">AVR-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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<hr>
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<a name="Opcodes-4"></a>
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<h4 class="subsection">9.5.3 Opcodes</h4>
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<a name="index-AVR-opcode-summary"></a>
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<a name="index-opcode-summary_002c-AVR"></a>
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<a name="index-mnemonics_002c-AVR"></a>
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<a name="index-instruction-summary_002c-AVR"></a>
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<p>For detailed information on the AVR machine instruction set, see
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<a href="www.atmel.com/products/AVR">www.atmel.com/products/AVR</a>.
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</p>
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<p><code>as</code> implements all the standard AVR opcodes.
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The following table summarizes the AVR opcodes, and their arguments.
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</p>
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<div class="smallexample">
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<pre class="smallexample"><i>Legend:</i>
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r <span class="roman">any register</span>
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d <span class="roman">‘ldi’ register (r16-r31)</span>
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v <span class="roman">‘movw’ even register (r0, r2, ..., r28, r30)</span>
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a <span class="roman">‘fmul’ register (r16-r23)</span>
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w <span class="roman">‘adiw’ register (r24,r26,r28,r30)</span>
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e <span class="roman">pointer registers (X,Y,Z)</span>
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b <span class="roman">base pointer register and displacement ([YZ]+disp)</span>
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z <span class="roman">Z pointer register (for [e]lpm Rd,Z[+])</span>
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M <span class="roman">immediate value from 0 to 255</span>
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n <span class="roman">immediate value from 0 to 255 ( n = ~M ). Relocation impossible</span>
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s <span class="roman">immediate value from 0 to 7</span>
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P <span class="roman">Port address value from 0 to 63. (in, out)</span>
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p <span class="roman">Port address value from 0 to 31. (cbi, sbi, sbic, sbis)</span>
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K <span class="roman">immediate value from 0 to 63 (used in ‘adiw’, ‘sbiw’)</span>
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i <span class="roman">immediate value</span>
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l <span class="roman">signed pc relative offset from -64 to 63</span>
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L <span class="roman">signed pc relative offset from -2048 to 2047</span>
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h <span class="roman">absolute code address (call, jmp)</span>
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S <span class="roman">immediate value from 0 to 7 (S = s << 4)</span>
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? <span class="roman">use this opcode entry if no parameters, else use next opcode entry</span>
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1001010010001000 clc
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1001010011011000 clh
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1001010011111000 cli
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1001010010101000 cln
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1001010011001000 cls
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1001010011101000 clt
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1001010010111000 clv
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1001010010011000 clz
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1001010000001000 sec
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1001010001011000 seh
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1001010001111000 sei
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1001010000101000 sen
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1001010001001000 ses
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1001010001101000 set
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1001010000111000 sev
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1001010000011000 sez
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100101001SSS1000 bclr S
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100101000SSS1000 bset S
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1001010100001001 icall
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1001010000001001 ijmp
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1001010111001000 lpm ?
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1001000ddddd010+ lpm r,z
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1001010111011000 elpm ?
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1001000ddddd011+ elpm r,z
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0000000000000000 nop
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1001010100001000 ret
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1001010100011000 reti
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1001010110001000 sleep
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1001010110011000 break
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1001010110101000 wdr
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1001010111101000 spm
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000111rdddddrrrr adc r,r
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000011rdddddrrrr add r,r
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001000rdddddrrrr and r,r
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000101rdddddrrrr cp r,r
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000001rdddddrrrr cpc r,r
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000100rdddddrrrr cpse r,r
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001001rdddddrrrr eor r,r
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001011rdddddrrrr mov r,r
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100111rdddddrrrr mul r,r
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001010rdddddrrrr or r,r
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000010rdddddrrrr sbc r,r
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000110rdddddrrrr sub r,r
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001001rdddddrrrr clr r
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000011rdddddrrrr lsl r
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000111rdddddrrrr rol r
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001000rdddddrrrr tst r
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0111KKKKddddKKKK andi d,M
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0111KKKKddddKKKK cbr d,n
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1110KKKKddddKKKK ldi d,M
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11101111dddd1111 ser d
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0110KKKKddddKKKK ori d,M
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0110KKKKddddKKKK sbr d,M
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0011KKKKddddKKKK cpi d,M
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0100KKKKddddKKKK sbci d,M
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0101KKKKddddKKKK subi d,M
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1111110rrrrr0sss sbrc r,s
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1111111rrrrr0sss sbrs r,s
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1111100ddddd0sss bld r,s
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1111101ddddd0sss bst r,s
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10110PPdddddPPPP in r,P
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10111PPrrrrrPPPP out P,r
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10010110KKddKKKK adiw w,K
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10010111KKddKKKK sbiw w,K
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10011000pppppsss cbi p,s
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10011010pppppsss sbi p,s
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10011001pppppsss sbic p,s
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10011011pppppsss sbis p,s
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111101lllllll000 brcc l
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111100lllllll000 brcs l
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111100lllllll001 breq l
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111101lllllll100 brge l
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111101lllllll101 brhc l
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111100lllllll101 brhs l
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111101lllllll111 brid l
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111100lllllll111 brie l
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111100lllllll000 brlo l
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111100lllllll100 brlt l
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111100lllllll010 brmi l
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111101lllllll001 brne l
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111101lllllll010 brpl l
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111101lllllll000 brsh l
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111101lllllll110 brtc l
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111100lllllll110 brts l
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111101lllllll011 brvc l
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111100lllllll011 brvs l
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111101lllllllsss brbc s,l
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111100lllllllsss brbs s,l
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1101LLLLLLLLLLLL rcall L
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1100LLLLLLLLLLLL rjmp L
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1001010hhhhh111h call h
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1001010hhhhh110h jmp h
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1001010rrrrr0101 asr r
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1001010rrrrr0000 com r
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1001010rrrrr1010 dec r
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1001010rrrrr0011 inc r
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1001010rrrrr0110 lsr r
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1001010rrrrr0001 neg r
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1001000rrrrr1111 pop r
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1001001rrrrr1111 push r
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1001010rrrrr0111 ror r
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1001010rrrrr0010 swap r
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00000001ddddrrrr movw v,v
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00000010ddddrrrr muls d,d
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000000110ddd0rrr mulsu a,a
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000000110ddd1rrr fmul a,a
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000000111ddd0rrr fmuls a,a
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000000111ddd1rrr fmulsu a,a
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1001001ddddd0000 sts i,r
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1001000ddddd0000 lds r,i
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10o0oo0dddddbooo ldd r,b
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100!000dddddee-+ ld r,e
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10o0oo1rrrrrbooo std b,r
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100!001rrrrree-+ st e,r
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1001010100011001 eicall
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1001010000011001 eijmp
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</pre></div>
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<hr>
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<div class="header">
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<p>
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Previous: <a href="AVR-Syntax.html#AVR-Syntax" accesskey="p" rel="prev">AVR Syntax</a>, Up: <a href="AVR_002dDependent.html#AVR_002dDependent" accesskey="u" rel="up">AVR-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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