136 lines
5.6 KiB
HTML
136 lines
5.6 KiB
HTML
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<title>Using as: ARM-Relocations</title>
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="ARM-Syntax.html#ARM-Syntax" rel="up" title="ARM Syntax">
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<link href="ARM_002dNeon_002dAlignment.html#ARM_002dNeon_002dAlignment" rel="next" title="ARM-Neon-Alignment">
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="ARM_002dRelocations"></a>
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<div class="header">
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<p>
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Next: <a href="ARM_002dNeon_002dAlignment.html#ARM_002dNeon_002dAlignment" accesskey="n" rel="next">ARM-Neon-Alignment</a>, Previous: <a href="ARM_002dRegs.html#ARM_002dRegs" accesskey="p" rel="prev">ARM-Regs</a>, Up: <a href="ARM-Syntax.html#ARM-Syntax" accesskey="u" rel="up">ARM Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="ARM-relocation-generation"></a>
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<h4 class="subsubsection">9.4.2.4 ARM relocation generation</h4>
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<a name="index-data-relocations_002c-ARM"></a>
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<a name="index-ARM-data-relocations"></a>
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<p>Specific data relocations can be generated by putting the relocation name
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in parentheses after the symbol name. For example:
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</p>
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<div class="smallexample">
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<pre class="smallexample"> .word foo(TARGET1)
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</pre></div>
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<p>This will generate an ‘<samp>R_ARM_TARGET1</samp>’ relocation against the symbol
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<var>foo</var>.
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The following relocations are supported:
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<code>GOT</code>,
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<code>GOTOFF</code>,
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<code>TARGET1</code>,
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<code>TARGET2</code>,
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<code>SBREL</code>,
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<code>TLSGD</code>,
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<code>TLSLDM</code>,
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<code>TLSLDO</code>,
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<code>TLSDESC</code>,
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<code>TLSCALL</code>,
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<code>GOTTPOFF</code>,
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<code>GOT_PREL</code>
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and
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<code>TPOFF</code>.
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</p>
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<p>For compatibility with older toolchains the assembler also accepts
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<code>(PLT)</code> after branch targets. On legacy targets this will
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generate the deprecated ‘<samp>R_ARM_PLT32</samp>’ relocation. On EABI
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targets it will encode either the ‘<samp>R_ARM_CALL</samp>’ or
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‘<samp>R_ARM_JUMP24</samp>’ relocation, as appropriate.
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</p>
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<a name="index-MOVW-and-MOVT-relocations_002c-ARM"></a>
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<p>Relocations for ‘<samp>MOVW</samp>’ and ‘<samp>MOVT</samp>’ instructions can be generated
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by prefixing the value with ‘<samp>#:lower16:</samp>’ and ‘<samp>#:upper16</samp>’
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respectively. For example to load the 32-bit address of foo into r0:
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</p>
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<div class="smallexample">
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<pre class="smallexample"> MOVW r0, #:lower16:foo
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MOVT r0, #:upper16:foo
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</pre></div>
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<p>Relocations ‘<samp>R_ARM_THM_ALU_ABS_G0_NC</samp>’, ‘<samp>R_ARM_THM_ALU_ABS_G1_NC</samp>’,
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‘<samp>R_ARM_THM_ALU_ABS_G2_NC</samp>’ and ‘<samp>R_ARM_THM_ALU_ABS_G3_NC</samp>’ can be
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generated by prefixing the value with ‘<samp>#:lower0_7:#</samp>’,
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‘<samp>#:lower8_15:#</samp>’, ‘<samp>#:upper0_7:#</samp>’ and ‘<samp>#:upper8_15:#</samp>’
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respectively. For example to load the 32-bit address of foo into r0:
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</p>
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<div class="smallexample">
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<pre class="smallexample"> MOVS r0, #:upper8_15:#foo
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LSLS r0, r0, #8
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ADDS r0, #:upper0_7:#foo
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LSLS r0, r0, #8
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ADDS r0, #:lower8_15:#foo
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LSLS r0, r0, #8
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ADDS r0, #:lower0_7:#foo
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</pre></div>
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