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<title>GNU Compiler Collection (GCC) Internals: define_peephole</title>
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Peephole-Definitions.html#Peephole-Definitions" rel="up" title="Peephole Definitions">
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<a name="define_005fpeephole"></a>
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<div class="header">
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<p>
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Next: <a href="define_005fpeephole2.html#define_005fpeephole2" accesskey="n" rel="next">define_peephole2</a>, Up: <a href="Peephole-Definitions.html#Peephole-Definitions" accesskey="u" rel="up">Peephole Definitions</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="RTL-to-Text-Peephole-Optimizers"></a>
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<h4 class="subsection">16.18.1 RTL to Text Peephole Optimizers</h4>
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<a name="index-define_005fpeephole"></a>
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<p>A definition looks like this:
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</p>
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<div class="smallexample">
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<pre class="smallexample">(define_peephole
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[<var>insn-pattern-1</var>
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<var>insn-pattern-2</var>
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…]
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"<var>condition</var>"
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"<var>template</var>"
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"<var>optional-insn-attributes</var>")
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</pre></div>
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<p>The last string operand may be omitted if you are not using any
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machine-specific information in this machine description. If present,
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it must obey the same rules as in a <code>define_insn</code>.
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</p>
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<p>In this skeleton, <var>insn-pattern-1</var> and so on are patterns to match
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consecutive insns. The optimization applies to a sequence of insns when
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<var>insn-pattern-1</var> matches the first one, <var>insn-pattern-2</var> matches
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the next, and so on.
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</p>
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<p>Each of the insns matched by a peephole must also match a
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<code>define_insn</code>. Peepholes are checked only at the last stage just
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before code generation, and only optionally. Therefore, any insn which
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would match a peephole but no <code>define_insn</code> will cause a crash in code
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generation in an unoptimized compilation, or at various optimization
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stages.
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</p>
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<p>The operands of the insns are matched with <code>match_operands</code>,
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<code>match_operator</code>, and <code>match_dup</code>, as usual. What is not
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usual is that the operand numbers apply to all the insn patterns in the
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definition. So, you can check for identical operands in two insns by
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using <code>match_operand</code> in one insn and <code>match_dup</code> in the
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other.
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</p>
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<p>The operand constraints used in <code>match_operand</code> patterns do not have
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any direct effect on the applicability of the peephole, but they will
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be validated afterward, so make sure your constraints are general enough
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to apply whenever the peephole matches. If the peephole matches
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but the constraints are not satisfied, the compiler will crash.
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</p>
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<p>It is safe to omit constraints in all the operands of the peephole; or
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you can write constraints which serve as a double-check on the criteria
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previously tested.
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</p>
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<p>Once a sequence of insns matches the patterns, the <var>condition</var> is
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checked. This is a C expression which makes the final decision whether to
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perform the optimization (we do so if the expression is nonzero). If
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<var>condition</var> is omitted (in other words, the string is empty) then the
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optimization is applied to every sequence of insns that matches the
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patterns.
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</p>
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<p>The defined peephole optimizations are applied after register allocation
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is complete. Therefore, the peephole definition can check which
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operands have ended up in which kinds of registers, just by looking at
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the operands.
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</p>
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<a name="index-prev_005factive_005finsn"></a>
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<p>The way to refer to the operands in <var>condition</var> is to write
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<code>operands[<var>i</var>]</code> for operand number <var>i</var> (as matched by
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<code>(match_operand <var>i</var> …)</code>). Use the variable <code>insn</code>
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to refer to the last of the insns being matched; use
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<code>prev_active_insn</code> to find the preceding insns.
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</p>
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<a name="index-dead_005for_005fset_005fp"></a>
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<p>When optimizing computations with intermediate results, you can use
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<var>condition</var> to match only when the intermediate results are not used
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elsewhere. Use the C expression <code>dead_or_set_p (<var>insn</var>,
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<var>op</var>)</code>, where <var>insn</var> is the insn in which you expect the value
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to be used for the last time (from the value of <code>insn</code>, together
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with use of <code>prev_nonnote_insn</code>), and <var>op</var> is the intermediate
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value (from <code>operands[<var>i</var>]</code>).
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</p>
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<p>Applying the optimization means replacing the sequence of insns with one
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new insn. The <var>template</var> controls ultimate output of assembler code
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for this combined insn. It works exactly like the template of a
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<code>define_insn</code>. Operand numbers in this template are the same ones
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used in matching the original sequence of insns.
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</p>
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<p>The result of a defined peephole optimizer does not need to match any of
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the insn patterns in the machine description; it does not even have an
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opportunity to match them. The peephole optimizer definition itself serves
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as the insn pattern to control how the insn is output.
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</p>
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<p>Defined peephole optimizers are run as assembler code is being output,
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so the insns they produce are never combined or rearranged in any way.
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</p>
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<p>Here is an example, taken from the 68000 machine description:
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</p>
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<div class="smallexample">
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<pre class="smallexample">(define_peephole
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[(set (reg:SI 15) (plus:SI (reg:SI 15) (const_int 4)))
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(set (match_operand:DF 0 "register_operand" "=f")
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(match_operand:DF 1 "register_operand" "ad"))]
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"FP_REG_P (operands[0]) && ! FP_REG_P (operands[1])"
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{
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rtx xoperands[2];
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xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
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#ifdef MOTOROLA
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output_asm_insn ("move.l %1,(sp)", xoperands);
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output_asm_insn ("move.l %1,-(sp)", operands);
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return "fmove.d (sp)+,%0";
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#else
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output_asm_insn ("movel %1,sp@", xoperands);
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output_asm_insn ("movel %1,sp@-", operands);
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return "fmoved sp@+,%0";
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#endif
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})
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</pre></div>
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<p>The effect of this optimization is to change
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</p>
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<div class="smallexample">
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<pre class="smallexample">jbsr _foobar
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addql #4,sp
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movel d1,sp@-
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movel d0,sp@-
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fmoved sp@+,fp0
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</pre></div>
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<p>into
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</p>
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<div class="smallexample">
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<pre class="smallexample">jbsr _foobar
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movel d1,sp@
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movel d0,sp@-
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fmoved sp@+,fp0
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</pre></div>
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<p><var>insn-pattern-1</var> and so on look <em>almost</em> like the second
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operand of <code>define_insn</code>. There is one important difference: the
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second operand of <code>define_insn</code> consists of one or more RTX’s
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enclosed in square brackets. Usually, there is only one: then the same
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action can be written as an element of a <code>define_peephole</code>. But
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when there are multiple actions in a <code>define_insn</code>, they are
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implicitly enclosed in a <code>parallel</code>. Then you must explicitly
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write the <code>parallel</code>, and the square brackets within it, in the
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<code>define_peephole</code>. Thus, if an insn pattern looks like this,
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</p>
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<div class="smallexample">
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<pre class="smallexample">(define_insn "divmodsi4"
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[(set (match_operand:SI 0 "general_operand" "=d")
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(div:SI (match_operand:SI 1 "general_operand" "0")
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(match_operand:SI 2 "general_operand" "dmsK")))
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(set (match_operand:SI 3 "general_operand" "=d")
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(mod:SI (match_dup 1) (match_dup 2)))]
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"TARGET_68020"
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"divsl%.l %2,%3:%0")
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</pre></div>
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<p>then the way to mention this insn in a peephole is as follows:
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</p>
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<div class="smallexample">
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<pre class="smallexample">(define_peephole
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[…
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(parallel
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[(set (match_operand:SI 0 "general_operand" "=d")
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(div:SI (match_operand:SI 1 "general_operand" "0")
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(match_operand:SI 2 "general_operand" "dmsK")))
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(set (match_operand:SI 3 "general_operand" "=d")
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(mod:SI (match_dup 1) (match_dup 2)))])
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…]
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…)
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</pre></div>
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<hr>
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<div class="header">
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<p>
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Next: <a href="define_005fpeephole2.html#define_005fpeephole2" accesskey="n" rel="next">define_peephole2</a>, Up: <a href="Peephole-Definitions.html#Peephole-Definitions" accesskey="u" rel="up">Peephole Definitions</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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