187 lines
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187 lines
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<head>
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<title>GNU Compiler Collection (GCC) Internals: Incdec</title>
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<link href="Option-Index.html#Option-Index" rel="index" title="Option Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="Incdec"></a>
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<div class="header">
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<p>
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Next: <a href="Assembler.html#Assembler" accesskey="n" rel="next">Assembler</a>, Previous: <a href="Side-Effects.html#Side-Effects" accesskey="p" rel="prev">Side Effects</a>, Up: <a href="RTL.html#RTL" accesskey="u" rel="up">RTL</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Embedded-Side_002dEffects-on-Addresses"></a>
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<h3 class="section">13.16 Embedded Side-Effects on Addresses</h3>
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<a name="index-RTL-preincrement"></a>
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<a name="index-RTL-postincrement"></a>
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<a name="index-RTL-predecrement"></a>
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<a name="index-RTL-postdecrement"></a>
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<p>Six special side-effect expression codes appear as memory addresses.
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</p>
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<dl compact="compact">
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<dd><a name="index-pre_005fdec"></a>
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</dd>
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<dt><code>(pre_dec:<var>m</var> <var>x</var>)</code></dt>
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<dd><p>Represents the side effect of decrementing <var>x</var> by a standard
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amount and represents also the value that <var>x</var> has after being
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decremented. <var>x</var> must be a <code>reg</code> or <code>mem</code>, but most
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machines allow only a <code>reg</code>. <var>m</var> must be the machine mode
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for pointers on the machine in use. The amount <var>x</var> is decremented
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by is the length in bytes of the machine mode of the containing memory
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reference of which this expression serves as the address. Here is an
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example of its use:
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</p>
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<div class="smallexample">
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<pre class="smallexample">(mem:DF (pre_dec:SI (reg:SI 39)))
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</pre></div>
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<p>This says to decrement pseudo register 39 by the length of a <code>DFmode</code>
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value and use the result to address a <code>DFmode</code> value.
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</p>
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<a name="index-pre_005finc"></a>
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</dd>
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<dt><code>(pre_inc:<var>m</var> <var>x</var>)</code></dt>
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<dd><p>Similar, but specifies incrementing <var>x</var> instead of decrementing it.
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</p>
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<a name="index-post_005fdec"></a>
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</dd>
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<dt><code>(post_dec:<var>m</var> <var>x</var>)</code></dt>
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<dd><p>Represents the same side effect as <code>pre_dec</code> but a different
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value. The value represented here is the value <var>x</var> has <i>before</i>
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being decremented.
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</p>
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<a name="index-post_005finc"></a>
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</dd>
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<dt><code>(post_inc:<var>m</var> <var>x</var>)</code></dt>
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<dd><p>Similar, but specifies incrementing <var>x</var> instead of decrementing it.
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</p>
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<a name="index-post_005fmodify"></a>
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</dd>
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<dt><code>(post_modify:<var>m</var> <var>x</var> <var>y</var>)</code></dt>
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<dd>
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<p>Represents the side effect of setting <var>x</var> to <var>y</var> and
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represents <var>x</var> before <var>x</var> is modified. <var>x</var> must be a
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<code>reg</code> or <code>mem</code>, but most machines allow only a <code>reg</code>.
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<var>m</var> must be the machine mode for pointers on the machine in use.
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</p>
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<p>The expression <var>y</var> must be one of three forms:
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<code>(plus:<var>m</var> <var>x</var> <var>z</var>)</code>,
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<code>(minus:<var>m</var> <var>x</var> <var>z</var>)</code>, or
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<code>(plus:<var>m</var> <var>x</var> <var>i</var>)</code>,
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where <var>z</var> is an index register and <var>i</var> is a constant.
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</p>
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<p>Here is an example of its use:
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</p>
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<div class="smallexample">
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<pre class="smallexample">(mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
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(reg:SI 48))))
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</pre></div>
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<p>This says to modify pseudo register 42 by adding the contents of pseudo
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register 48 to it, after the use of what ever 42 points to.
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</p>
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<a name="index-pre_005fmodify"></a>
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</dd>
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<dt><code>(pre_modify:<var>m</var> <var>x</var> <var>expr</var>)</code></dt>
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<dd><p>Similar except side effects happen before the use.
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</p></dd>
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</dl>
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<p>These embedded side effect expressions must be used with care. Instruction
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patterns may not use them. Until the ‘<samp>flow</samp>’ pass of the compiler,
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they may occur only to represent pushes onto the stack. The ‘<samp>flow</samp>’
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pass finds cases where registers are incremented or decremented in one
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instruction and used as an address shortly before or after; these cases are
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then transformed to use pre- or post-increment or -decrement.
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</p>
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<p>If a register used as the operand of these expressions is used in
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another address in an insn, the original value of the register is used.
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Uses of the register outside of an address are not permitted within the
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same insn as a use in an embedded side effect expression because such
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insns behave differently on different machines and hence must be treated
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as ambiguous and disallowed.
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</p>
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<p>An instruction that can be represented with an embedded side effect
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could also be represented using <code>parallel</code> containing an additional
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<code>set</code> to describe how the address register is altered. This is not
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done because machines that allow these operations at all typically
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allow them wherever a memory address is called for. Describing them as
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additional parallel stores would require doubling the number of entries
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in the machine description.
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</p>
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<hr>
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<div class="header">
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<p>
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Next: <a href="Assembler.html#Assembler" accesskey="n" rel="next">Assembler</a>, Previous: <a href="Side-Effects.html#Side-Effects" accesskey="p" rel="prev">Side Effects</a>, Up: <a href="RTL.html#RTL" accesskey="u" rel="up">RTL</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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