473 lines
19 KiB
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473 lines
19 KiB
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<head>
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<title>Using the GNU Compiler Collection (GCC): Nios II Options</title>
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<meta name="description" content="Using the GNU Compiler Collection (GCC): Nios II Options">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="Option-Index.html#Option-Index" rel="index" title="Option Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options">
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<link href="Nvidia-PTX-Options.html#Nvidia-PTX-Options" rel="next" title="Nvidia PTX Options">
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<link href="NDS32-Options.html#NDS32-Options" rel="prev" title="NDS32 Options">
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</head>
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="Nios-II-Options"></a>
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<div class="header">
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<p>
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Next: <a href="Nvidia-PTX-Options.html#Nvidia-PTX-Options" accesskey="n" rel="next">Nvidia PTX Options</a>, Previous: <a href="NDS32-Options.html#NDS32-Options" accesskey="p" rel="prev">NDS32 Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Nios-II-Options-1"></a>
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<h4 class="subsection">3.18.32 Nios II Options</h4>
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<a name="index-Nios-II-options"></a>
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<a name="index-Altera-Nios-II-options"></a>
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<p>These are the options defined for the Altera Nios II processor.
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</p>
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<dl compact="compact">
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<dt><code>-G <var>num</var></code></dt>
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<dd><a name="index-G-2"></a>
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<a name="index-smaller-data-references-1"></a>
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<p>Put global and static objects less than or equal to <var>num</var> bytes
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into the small data or BSS sections instead of the normal data or BSS
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sections. The default value of <var>num</var> is 8.
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</p>
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</dd>
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<dt><code>-mgpopt=<var>option</var></code></dt>
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<dt><code>-mgpopt</code></dt>
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<dt><code>-mno-gpopt</code></dt>
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<dd><a name="index-mgpopt-1"></a>
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<a name="index-mno_002dgpopt-1"></a>
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<p>Generate (do not generate) GP-relative accesses. The following
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<var>option</var> names are recognized:
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</p>
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<dl compact="compact">
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<dt>‘<samp>none</samp>’</dt>
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<dd><p>Do not generate GP-relative accesses.
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</p>
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</dd>
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<dt>‘<samp>local</samp>’</dt>
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<dd><p>Generate GP-relative accesses for small data objects that are not
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external, weak, or uninitialized common symbols.
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Also use GP-relative addressing for objects that
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have been explicitly placed in a small data section via a <code>section</code>
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attribute.
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</p>
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</dd>
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<dt>‘<samp>global</samp>’</dt>
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<dd><p>As for ‘<samp>local</samp>’, but also generate GP-relative accesses for
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small data objects that are external, weak, or common. If you use this option,
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you must ensure that all parts of your program (including libraries) are
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compiled with the same <samp>-G</samp> setting.
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</p>
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</dd>
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<dt>‘<samp>data</samp>’</dt>
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<dd><p>Generate GP-relative accesses for all data objects in the program. If you
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use this option, the entire data and BSS segments
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of your program must fit in 64K of memory and you must use an appropriate
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linker script to allocate them within the addressable range of the
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global pointer.
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</p>
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</dd>
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<dt>‘<samp>all</samp>’</dt>
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<dd><p>Generate GP-relative addresses for function pointers as well as data
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pointers. If you use this option, the entire text, data, and BSS segments
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of your program must fit in 64K of memory and you must use an appropriate
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linker script to allocate them within the addressable range of the
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global pointer.
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</p>
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</dd>
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</dl>
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<p><samp>-mgpopt</samp> is equivalent to <samp>-mgpopt=local</samp>, and
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<samp>-mno-gpopt</samp> is equivalent to <samp>-mgpopt=none</samp>.
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</p>
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<p>The default is <samp>-mgpopt</samp> except when <samp>-fpic</samp> or
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<samp>-fPIC</samp> is specified to generate position-independent code.
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Note that the Nios II ABI does not permit GP-relative accesses from
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shared libraries.
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</p>
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<p>You may need to specify <samp>-mno-gpopt</samp> explicitly when building
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programs that include large amounts of small data, including large
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GOT data sections. In this case, the 16-bit offset for GP-relative
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addressing may not be large enough to allow access to the entire
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small data section.
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</p>
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</dd>
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<dt><code>-mel</code></dt>
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<dt><code>-meb</code></dt>
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<dd><a name="index-mel-2"></a>
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<a name="index-meb-2"></a>
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<p>Generate little-endian (default) or big-endian (experimental) code,
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respectively.
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</p>
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</dd>
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<dt><code>-march=<var>arch</var></code></dt>
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<dd><a name="index-march-9"></a>
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<p>This specifies the name of the target Nios II architecture. GCC uses this
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name to determine what kind of instructions it can emit when generating
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assembly code. Permissible names are: ‘<samp>r1</samp>’, ‘<samp>r2</samp>’.
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</p>
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<p>The preprocessor macro <code>__nios2_arch__</code> is available to programs,
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with value 1 or 2, indicating the targeted ISA level.
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</p>
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</dd>
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<dt><code>-mbypass-cache</code></dt>
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<dt><code>-mno-bypass-cache</code></dt>
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<dd><a name="index-mno_002dbypass_002dcache"></a>
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<a name="index-mbypass_002dcache"></a>
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<p>Force all load and store instructions to always bypass cache by
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using I/O variants of the instructions. The default is not to
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bypass the cache.
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</p>
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</dd>
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<dt><code>-mno-cache-volatile</code></dt>
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<dt><code>-mcache-volatile</code></dt>
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<dd><a name="index-mcache_002dvolatile"></a>
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<a name="index-mno_002dcache_002dvolatile"></a>
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<p>Volatile memory access bypass the cache using the I/O variants of
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the load and store instructions. The default is not to bypass the cache.
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</p>
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</dd>
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<dt><code>-mno-fast-sw-div</code></dt>
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<dt><code>-mfast-sw-div</code></dt>
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<dd><a name="index-mno_002dfast_002dsw_002ddiv"></a>
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<a name="index-mfast_002dsw_002ddiv"></a>
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<p>Do not use table-based fast divide for small numbers. The default
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is to use the fast divide at <samp>-O3</samp> and above.
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</p>
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</dd>
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<dt><code>-mno-hw-mul</code></dt>
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<dt><code>-mhw-mul</code></dt>
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<dt><code>-mno-hw-mulx</code></dt>
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<dt><code>-mhw-mulx</code></dt>
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<dt><code>-mno-hw-div</code></dt>
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<dt><code>-mhw-div</code></dt>
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<dd><a name="index-mno_002dhw_002dmul"></a>
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<a name="index-mhw_002dmul"></a>
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<a name="index-mno_002dhw_002dmulx"></a>
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<a name="index-mhw_002dmulx"></a>
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<a name="index-mno_002dhw_002ddiv"></a>
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<a name="index-mhw_002ddiv"></a>
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<p>Enable or disable emitting <code>mul</code>, <code>mulx</code> and <code>div</code> family of
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instructions by the compiler. The default is to emit <code>mul</code>
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and not emit <code>div</code> and <code>mulx</code>.
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</p>
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</dd>
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<dt><code>-mbmx</code></dt>
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<dt><code>-mno-bmx</code></dt>
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<dt><code>-mcdx</code></dt>
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<dt><code>-mno-cdx</code></dt>
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<dd><p>Enable or disable generation of Nios II R2 BMX (bit manipulation) and
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CDX (code density) instructions. Enabling these instructions also
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requires <samp>-march=r2</samp>. Since these instructions are optional
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extensions to the R2 architecture, the default is not to emit them.
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</p>
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</dd>
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<dt><code>-mcustom-<var>insn</var>=<var>N</var></code></dt>
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<dt><code>-mno-custom-<var>insn</var></code></dt>
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<dd><a name="index-mcustom_002dinsn"></a>
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<a name="index-mno_002dcustom_002dinsn"></a>
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<p>Each <samp>-mcustom-<var>insn</var>=<var>N</var></samp> option enables use of a
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custom instruction with encoding <var>N</var> when generating code that uses
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<var>insn</var>. For example, <samp>-mcustom-fadds=253</samp> generates custom
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instruction 253 for single-precision floating-point add operations instead
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of the default behavior of using a library call.
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</p>
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<p>The following values of <var>insn</var> are supported. Except as otherwise
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noted, floating-point operations are expected to be implemented with
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normal IEEE 754 semantics and correspond directly to the C operators or the
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equivalent GCC built-in functions (see <a href="Other-Builtins.html#Other-Builtins">Other Builtins</a>).
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</p>
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<p>Single-precision floating point:
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</p><dl compact="compact">
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<dt>‘<samp>fadds</samp>’, ‘<samp>fsubs</samp>’, ‘<samp>fdivs</samp>’, ‘<samp>fmuls</samp>’</dt>
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<dd><p>Binary arithmetic operations.
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</p>
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</dd>
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<dt>‘<samp>fnegs</samp>’</dt>
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<dd><p>Unary negation.
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</p>
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</dd>
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<dt>‘<samp>fabss</samp>’</dt>
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<dd><p>Unary absolute value.
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</p>
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</dd>
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<dt>‘<samp>fcmpeqs</samp>’, ‘<samp>fcmpges</samp>’, ‘<samp>fcmpgts</samp>’, ‘<samp>fcmples</samp>’, ‘<samp>fcmplts</samp>’, ‘<samp>fcmpnes</samp>’</dt>
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<dd><p>Comparison operations.
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</p>
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</dd>
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<dt>‘<samp>fmins</samp>’, ‘<samp>fmaxs</samp>’</dt>
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<dd><p>Floating-point minimum and maximum. These instructions are only
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generated if <samp>-ffinite-math-only</samp> is specified.
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</p>
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</dd>
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<dt>‘<samp>fsqrts</samp>’</dt>
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<dd><p>Unary square root operation.
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</p>
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</dd>
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<dt>‘<samp>fcoss</samp>’, ‘<samp>fsins</samp>’, ‘<samp>ftans</samp>’, ‘<samp>fatans</samp>’, ‘<samp>fexps</samp>’, ‘<samp>flogs</samp>’</dt>
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<dd><p>Floating-point trigonometric and exponential functions. These instructions
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are only generated if <samp>-funsafe-math-optimizations</samp> is also specified.
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</p>
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</dd>
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</dl>
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<p>Double-precision floating point:
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</p><dl compact="compact">
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<dt>‘<samp>faddd</samp>’, ‘<samp>fsubd</samp>’, ‘<samp>fdivd</samp>’, ‘<samp>fmuld</samp>’</dt>
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<dd><p>Binary arithmetic operations.
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</p>
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</dd>
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<dt>‘<samp>fnegd</samp>’</dt>
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<dd><p>Unary negation.
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</p>
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</dd>
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<dt>‘<samp>fabsd</samp>’</dt>
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<dd><p>Unary absolute value.
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</p>
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</dd>
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<dt>‘<samp>fcmpeqd</samp>’, ‘<samp>fcmpged</samp>’, ‘<samp>fcmpgtd</samp>’, ‘<samp>fcmpled</samp>’, ‘<samp>fcmpltd</samp>’, ‘<samp>fcmpned</samp>’</dt>
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<dd><p>Comparison operations.
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</p>
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</dd>
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<dt>‘<samp>fmind</samp>’, ‘<samp>fmaxd</samp>’</dt>
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<dd><p>Double-precision minimum and maximum. These instructions are only
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generated if <samp>-ffinite-math-only</samp> is specified.
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</p>
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</dd>
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<dt>‘<samp>fsqrtd</samp>’</dt>
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<dd><p>Unary square root operation.
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</p>
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</dd>
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<dt>‘<samp>fcosd</samp>’, ‘<samp>fsind</samp>’, ‘<samp>ftand</samp>’, ‘<samp>fatand</samp>’, ‘<samp>fexpd</samp>’, ‘<samp>flogd</samp>’</dt>
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<dd><p>Double-precision trigonometric and exponential functions. These instructions
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are only generated if <samp>-funsafe-math-optimizations</samp> is also specified.
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</p>
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</dd>
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</dl>
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<p>Conversions:
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</p><dl compact="compact">
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<dt>‘<samp>fextsd</samp>’</dt>
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<dd><p>Conversion from single precision to double precision.
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</p>
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</dd>
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<dt>‘<samp>ftruncds</samp>’</dt>
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<dd><p>Conversion from double precision to single precision.
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</p>
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</dd>
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<dt>‘<samp>fixsi</samp>’, ‘<samp>fixsu</samp>’, ‘<samp>fixdi</samp>’, ‘<samp>fixdu</samp>’</dt>
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<dd><p>Conversion from floating point to signed or unsigned integer types, with
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truncation towards zero.
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</p>
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</dd>
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<dt>‘<samp>round</samp>’</dt>
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<dd><p>Conversion from single-precision floating point to signed integer,
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rounding to the nearest integer and ties away from zero.
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This corresponds to the <code>__builtin_lroundf</code> function when
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<samp>-fno-math-errno</samp> is used.
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</p>
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</dd>
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<dt>‘<samp>floatis</samp>’, ‘<samp>floatus</samp>’, ‘<samp>floatid</samp>’, ‘<samp>floatud</samp>’</dt>
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<dd><p>Conversion from signed or unsigned integer types to floating-point types.
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</p>
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</dd>
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</dl>
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<p>In addition, all of the following transfer instructions for internal
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registers X and Y must be provided to use any of the double-precision
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floating-point instructions. Custom instructions taking two
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double-precision source operands expect the first operand in the
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64-bit register X. The other operand (or only operand of a unary
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operation) is given to the custom arithmetic instruction with the
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least significant half in source register <var>src1</var> and the most
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significant half in <var>src2</var>. A custom instruction that returns a
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double-precision result returns the most significant 32 bits in the
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destination register and the other half in 32-bit register Y.
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GCC automatically generates the necessary code sequences to write
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register X and/or read register Y when double-precision floating-point
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instructions are used.
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</p>
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<dl compact="compact">
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<dt>‘<samp>fwrx</samp>’</dt>
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<dd><p>Write <var>src1</var> into the least significant half of X and <var>src2</var> into
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the most significant half of X.
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</p>
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</dd>
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<dt>‘<samp>fwry</samp>’</dt>
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<dd><p>Write <var>src1</var> into Y.
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</p>
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</dd>
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<dt>‘<samp>frdxhi</samp>’, ‘<samp>frdxlo</samp>’</dt>
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<dd><p>Read the most or least (respectively) significant half of X and store it in
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<var>dest</var>.
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</p>
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</dd>
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<dt>‘<samp>frdy</samp>’</dt>
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<dd><p>Read the value of Y and store it into <var>dest</var>.
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</p></dd>
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</dl>
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<p>Note that you can gain more local control over generation of Nios II custom
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instructions by using the <code>target("custom-<var>insn</var>=<var>N</var>")</code>
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and <code>target("no-custom-<var>insn</var>")</code> function attributes
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(see <a href="Function-Attributes.html#Function-Attributes">Function Attributes</a>)
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or pragmas (see <a href="Function-Specific-Option-Pragmas.html#Function-Specific-Option-Pragmas">Function Specific Option Pragmas</a>).
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</p>
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</dd>
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<dt><code>-mcustom-fpu-cfg=<var>name</var></code></dt>
|
|
<dd><a name="index-mcustom_002dfpu_002dcfg"></a>
|
|
|
|
<p>This option enables a predefined, named set of custom instruction encodings
|
|
(see <samp>-mcustom-<var>insn</var></samp> above).
|
|
Currently, the following sets are defined:
|
|
</p>
|
|
<p><samp>-mcustom-fpu-cfg=60-1</samp> is equivalent to:
|
|
</p><div class="smallexample">
|
|
<pre class="smallexample">-mcustom-fmuls=252
|
|
-mcustom-fadds=253
|
|
-mcustom-fsubs=254
|
|
-fsingle-precision-constant
|
|
</pre></div>
|
|
|
|
<p><samp>-mcustom-fpu-cfg=60-2</samp> is equivalent to:
|
|
</p><div class="smallexample">
|
|
<pre class="smallexample">-mcustom-fmuls=252
|
|
-mcustom-fadds=253
|
|
-mcustom-fsubs=254
|
|
-mcustom-fdivs=255
|
|
-fsingle-precision-constant
|
|
</pre></div>
|
|
|
|
<p><samp>-mcustom-fpu-cfg=72-3</samp> is equivalent to:
|
|
</p><div class="smallexample">
|
|
<pre class="smallexample">-mcustom-floatus=243
|
|
-mcustom-fixsi=244
|
|
-mcustom-floatis=245
|
|
-mcustom-fcmpgts=246
|
|
-mcustom-fcmples=249
|
|
-mcustom-fcmpeqs=250
|
|
-mcustom-fcmpnes=251
|
|
-mcustom-fmuls=252
|
|
-mcustom-fadds=253
|
|
-mcustom-fsubs=254
|
|
-mcustom-fdivs=255
|
|
-fsingle-precision-constant
|
|
</pre></div>
|
|
|
|
<p>Custom instruction assignments given by individual
|
|
<samp>-mcustom-<var>insn</var>=</samp> options override those given by
|
|
<samp>-mcustom-fpu-cfg=</samp>, regardless of the
|
|
order of the options on the command line.
|
|
</p>
|
|
<p>Note that you can gain more local control over selection of a FPU
|
|
configuration by using the <code>target("custom-fpu-cfg=<var>name</var>")</code>
|
|
function attribute (see <a href="Function-Attributes.html#Function-Attributes">Function Attributes</a>)
|
|
or pragma (see <a href="Function-Specific-Option-Pragmas.html#Function-Specific-Option-Pragmas">Function Specific Option Pragmas</a>).
|
|
</p>
|
|
</dd>
|
|
</dl>
|
|
|
|
<p>These additional ‘<samp>-m</samp>’ options are available for the Altera Nios II
|
|
ELF (bare-metal) target:
|
|
</p>
|
|
<dl compact="compact">
|
|
<dt><code>-mhal</code></dt>
|
|
<dd><a name="index-mhal"></a>
|
|
<p>Link with HAL BSP. This suppresses linking with the GCC-provided C runtime
|
|
startup and termination code, and is typically used in conjunction with
|
|
<samp>-msys-crt0=</samp> to specify the location of the alternate startup code
|
|
provided by the HAL BSP.
|
|
</p>
|
|
</dd>
|
|
<dt><code>-msmallc</code></dt>
|
|
<dd><a name="index-msmallc"></a>
|
|
<p>Link with a limited version of the C library, <samp>-lsmallc</samp>, rather than
|
|
Newlib.
|
|
</p>
|
|
</dd>
|
|
<dt><code>-msys-crt0=<var>startfile</var></code></dt>
|
|
<dd><a name="index-msys_002dcrt0"></a>
|
|
<p><var>startfile</var> is the file name of the startfile (crt0) to use
|
|
when linking. This option is only useful in conjunction with <samp>-mhal</samp>.
|
|
</p>
|
|
</dd>
|
|
<dt><code>-msys-lib=<var>systemlib</var></code></dt>
|
|
<dd><a name="index-msys_002dlib"></a>
|
|
<p><var>systemlib</var> is the library name of the library that provides
|
|
low-level system calls required by the C library,
|
|
e.g. <code>read</code> and <code>write</code>.
|
|
This option is typically used to link with a library provided by a HAL BSP.
|
|
</p>
|
|
</dd>
|
|
</dl>
|
|
|
|
<hr>
|
|
<div class="header">
|
|
<p>
|
|
Next: <a href="Nvidia-PTX-Options.html#Nvidia-PTX-Options" accesskey="n" rel="next">Nvidia PTX Options</a>, Previous: <a href="NDS32-Options.html#NDS32-Options" accesskey="p" rel="prev">NDS32 Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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