toolchain/gcc-linaro-6.3.1-2017.02-x8.../share/doc/as.html/NDS32-Options.html

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<a name="NDS32-Options-1"></a>
<h4 class="subsection">9.30.1 NDS32 Options</h4>

<a name="index-NDS32-options"></a>
<a name="index-options-for-NDS32"></a>
<p>The NDS32 configurations of <small>GNU</small> <code>as</code> support these
special options:
</p>
<dl compact="compact">
<dt><code>-O1</code></dt>
<dd><p>Optimize for performance.
</p>
</dd>
<dt><code>-Os</code></dt>
<dd><p>Optimize for space.
</p>
</dd>
<dt><code>-EL</code></dt>
<dd><p>Produce little endian data output.
</p>
</dd>
<dt><code>-EB</code></dt>
<dd><p>Produce little endian data output.
</p>
</dd>
<dt><code>-mpic</code></dt>
<dd><p>Generate PIC.
</p>
</dd>
<dt><code>-mno-fp-as-gp-relax</code></dt>
<dd><p>Suppress fp-as-gp relaxation for this file.
</p>
</dd>
<dt><code>-mb2bb-relax</code></dt>
<dd><p>Back-to-back branch optimization.
</p>
</dd>
<dt><code>-mno-all-relax</code></dt>
<dd><p>Suppress all relaxation for this file.
</p>
</dd>
<dt><code>-march=&lt;arch name&gt;</code></dt>
<dd><p>Assemble for architecture &lt;arch name&gt; which could be v3, v3j, v3m, v3f,
v3s, v2, v2j, v2f, v2s.
</p>
</dd>
<dt><code>-mbaseline=&lt;baseline&gt;</code></dt>
<dd><p>Assemble for baseline &lt;baseline&gt; which could be v2, v3, v3m.
</p>
</dd>
<dt><code>-mfpu-freg=<var>FREG</var></code></dt>
<dd><p>Specify a FPU configuration.
</p><dl compact="compact">
<dt><code>0      8 SP /  4 DP registers</code></dt>
<dt><code>1     16 SP /  8 DP registers</code></dt>
<dt><code>2     32 SP / 16 DP registers</code></dt>
<dt><code>3     32 SP / 32 DP registers</code></dt>
</dl>

</dd>
<dt><code>-mabi=<var>abi</var></code></dt>
<dd><p>Specify a abi version &lt;abi&gt; could be v1, v2, v2fp, v2fpp.
</p>
</dd>
<dt><code>-m[no-]mac</code></dt>
<dd><p>Enable/Disable Multiply instructions support.
</p>
</dd>
<dt><code>-m[no-]div</code></dt>
<dd><p>Enable/Disable Divide instructions support.
</p>
</dd>
<dt><code>-m[no-]16bit-ext</code></dt>
<dd><p>Enable/Disable 16-bit extension
</p>
</dd>
<dt><code>-m[no-]dx-regs</code></dt>
<dd><p>Enable/Disable d0/d1 registers
</p>
</dd>
<dt><code>-m[no-]perf-ext</code></dt>
<dd><p>Enable/Disable Performance extension
</p>
</dd>
<dt><code>-m[no-]perf2-ext</code></dt>
<dd><p>Enable/Disable Performance extension 2
</p>
</dd>
<dt><code>-m[no-]string-ext</code></dt>
<dd><p>Enable/Disable String extension
</p>
</dd>
<dt><code>-m[no-]reduced-regs</code></dt>
<dd><p>Enable/Disable Reduced Register configuration (GPR16) option
</p>
</dd>
<dt><code>-m[no-]audio-isa-ext</code></dt>
<dd><p>Enable/Disable AUDIO ISA extension
</p>
</dd>
<dt><code>-m[no-]fpu-sp-ext</code></dt>
<dd><p>Enable/Disable FPU SP extension
</p>
</dd>
<dt><code>-m[no-]fpu-dp-ext</code></dt>
<dd><p>Enable/Disable FPU DP extension
</p>
</dd>
<dt><code>-m[no-]fpu-fma</code></dt>
<dd><p>Enable/Disable FPU fused-multiply-add instructions
</p>
</dd>
<dt><code>-mall-ext</code></dt>
<dd><p>Turn on all extensions and instructions support
</p></dd>
</dl>


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