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236 lines
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<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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<html>
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<!-- Copyright (C) 1988-2016 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3 or
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any later version published by the Free Software Foundation; with the
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Invariant Sections being "Funding Free Software", the Front-Cover
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Texts being (a) (see below), and with the Back-Cover Texts being (b)
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(see below). A copy of the license is included in the section entitled
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"GNU Free Documentation License".
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(a) The FSF's Front-Cover Text is:
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A GNU Manual
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(b) The FSF's Back-Cover Text is:
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You have freedom to copy and modify this GNU Manual, like GNU
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software. Copies published by the Free Software Foundation raise
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funds for GNU development. -->
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<!-- Created by GNU Texinfo 5.2, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>Using the GNU Compiler Collection (GCC): SPU Options</title>
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<meta name="description" content="Using the GNU Compiler Collection (GCC): SPU Options">
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<meta name="keywords" content="Using the GNU Compiler Collection (GCC): SPU Options">
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<meta name="resource-type" content="document">
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<meta name="distribution" content="global">
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<meta name="Generator" content="makeinfo">
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<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="Option-Index.html#Option-Index" rel="index" title="Option Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options">
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<link href="System-V-Options.html#System-V-Options" rel="next" title="System V Options">
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<link href="SPARC-Options.html#SPARC-Options" rel="prev" title="SPARC Options">
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</style>
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</head>
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="SPU-Options"></a>
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<div class="header">
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<p>
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Next: <a href="System-V-Options.html#System-V-Options" accesskey="n" rel="next">System V Options</a>, Previous: <a href="SPARC-Options.html#SPARC-Options" accesskey="p" rel="prev">SPARC Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="SPU-Options-1"></a>
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<h4 class="subsection">3.18.45 SPU Options</h4>
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<a name="index-SPU-options"></a>
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<p>These ‘<samp>-m</samp>’ options are supported on the SPU:
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</p>
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<dl compact="compact">
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<dt><code>-mwarn-reloc</code></dt>
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<dt><code>-merror-reloc</code></dt>
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<dd><a name="index-mwarn_002dreloc"></a>
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<a name="index-merror_002dreloc"></a>
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<p>The loader for SPU does not handle dynamic relocations. By default, GCC
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gives an error when it generates code that requires a dynamic
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relocation. <samp>-mno-error-reloc</samp> disables the error,
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<samp>-mwarn-reloc</samp> generates a warning instead.
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</p>
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</dd>
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<dt><code>-msafe-dma</code></dt>
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<dt><code>-munsafe-dma</code></dt>
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<dd><a name="index-msafe_002ddma"></a>
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<a name="index-munsafe_002ddma"></a>
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<p>Instructions that initiate or test completion of DMA must not be
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reordered with respect to loads and stores of the memory that is being
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accessed.
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With <samp>-munsafe-dma</samp> you must use the <code>volatile</code> keyword to protect
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memory accesses, but that can lead to inefficient code in places where the
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memory is known to not change. Rather than mark the memory as volatile,
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you can use <samp>-msafe-dma</samp> to tell the compiler to treat
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the DMA instructions as potentially affecting all memory.
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</p>
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</dd>
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<dt><code>-mbranch-hints</code></dt>
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<dd><a name="index-mbranch_002dhints"></a>
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<p>By default, GCC generates a branch hint instruction to avoid
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pipeline stalls for always-taken or probably-taken branches. A hint
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is not generated closer than 8 instructions away from its branch.
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There is little reason to disable them, except for debugging purposes,
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or to make an object a little bit smaller.
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</p>
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</dd>
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<dt><code>-msmall-mem</code></dt>
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<dt><code>-mlarge-mem</code></dt>
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<dd><a name="index-msmall_002dmem"></a>
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<a name="index-mlarge_002dmem"></a>
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<p>By default, GCC generates code assuming that addresses are never larger
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than 18 bits. With <samp>-mlarge-mem</samp> code is generated that assumes
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a full 32-bit address.
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</p>
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</dd>
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<dt><code>-mstdmain</code></dt>
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<dd><a name="index-mstdmain"></a>
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<p>By default, GCC links against startup code that assumes the SPU-style
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main function interface (which has an unconventional parameter list).
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With <samp>-mstdmain</samp>, GCC links your program against startup
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code that assumes a C99-style interface to <code>main</code>, including a
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local copy of <code>argv</code> strings.
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</p>
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</dd>
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<dt><code>-mfixed-range=<var>register-range</var></code></dt>
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<dd><a name="index-mfixed_002drange-3"></a>
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<p>Generate code treating the given register range as fixed registers.
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A fixed register is one that the register allocator cannot use. This is
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useful when compiling kernel code. A register range is specified as
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two registers separated by a dash. Multiple register ranges can be
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specified separated by a comma.
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</p>
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</dd>
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<dt><code>-mea32</code></dt>
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<dt><code>-mea64</code></dt>
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<dd><a name="index-mea32"></a>
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<a name="index-mea64"></a>
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<p>Compile code assuming that pointers to the PPU address space accessed
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via the <code>__ea</code> named address space qualifier are either 32 or 64
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bits wide. The default is 32 bits. As this is an ABI-changing option,
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all object code in an executable must be compiled with the same setting.
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</p>
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</dd>
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<dt><code>-maddress-space-conversion</code></dt>
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<dt><code>-mno-address-space-conversion</code></dt>
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<dd><a name="index-maddress_002dspace_002dconversion"></a>
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<a name="index-mno_002daddress_002dspace_002dconversion"></a>
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<p>Allow/disallow treating the <code>__ea</code> address space as superset
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of the generic address space. This enables explicit type casts
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between <code>__ea</code> and generic pointer as well as implicit
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conversions of generic pointers to <code>__ea</code> pointers. The
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default is to allow address space pointer conversions.
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</p>
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</dd>
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<dt><code>-mcache-size=<var>cache-size</var></code></dt>
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<dd><a name="index-mcache_002dsize"></a>
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<p>This option controls the version of libgcc that the compiler links to an
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executable and selects a software-managed cache for accessing variables
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in the <code>__ea</code> address space with a particular cache size. Possible
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options for <var>cache-size</var> are ‘<samp>8</samp>’, ‘<samp>16</samp>’, ‘<samp>32</samp>’, ‘<samp>64</samp>’
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and ‘<samp>128</samp>’. The default cache size is 64KB.
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</p>
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</dd>
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<dt><code>-matomic-updates</code></dt>
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<dt><code>-mno-atomic-updates</code></dt>
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<dd><a name="index-matomic_002dupdates"></a>
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<a name="index-mno_002datomic_002dupdates"></a>
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<p>This option controls the version of libgcc that the compiler links to an
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executable and selects whether atomic updates to the software-managed
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cache of PPU-side variables are used. If you use atomic updates, changes
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to a PPU variable from SPU code using the <code>__ea</code> named address space
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qualifier do not interfere with changes to other PPU variables residing
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in the same cache line from PPU code. If you do not use atomic updates,
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such interference may occur; however, writing back cache lines is
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more efficient. The default behavior is to use atomic updates.
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</p>
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</dd>
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<dt><code>-mdual-nops</code></dt>
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<dt><code>-mdual-nops=<var>n</var></code></dt>
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<dd><a name="index-mdual_002dnops"></a>
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<p>By default, GCC inserts nops to increase dual issue when it expects
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it to increase performance. <var>n</var> can be a value from 0 to 10. A
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smaller <var>n</var> inserts fewer nops. 10 is the default, 0 is the
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same as <samp>-mno-dual-nops</samp>. Disabled with <samp>-Os</samp>.
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</p>
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</dd>
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<dt><code>-mhint-max-nops=<var>n</var></code></dt>
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<dd><a name="index-mhint_002dmax_002dnops"></a>
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<p>Maximum number of nops to insert for a branch hint. A branch hint must
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be at least 8 instructions away from the branch it is affecting. GCC
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inserts up to <var>n</var> nops to enforce this, otherwise it does not
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generate the branch hint.
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</p>
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</dd>
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<dt><code>-mhint-max-distance=<var>n</var></code></dt>
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<dd><a name="index-mhint_002dmax_002ddistance"></a>
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<p>The encoding of the branch hint instruction limits the hint to be within
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256 instructions of the branch it is affecting. By default, GCC makes
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sure it is within 125.
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</p>
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</dd>
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<dt><code>-msafe-hints</code></dt>
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<dd><a name="index-msafe_002dhints"></a>
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<p>Work around a hardware bug that causes the SPU to stall indefinitely.
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By default, GCC inserts the <code>hbrp</code> instruction to make sure
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this stall won’t happen.
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</p>
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</dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Next: <a href="System-V-Options.html#System-V-Options" accesskey="n" rel="next">System V Options</a>, Previous: <a href="SPARC-Options.html#SPARC-Options" accesskey="p" rel="prev">SPARC Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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