312 lines
15 KiB
HTML
312 lines
15 KiB
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<!-- Copyright (C) 1988-2016 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3 or
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any later version published by the Free Software Foundation; with the
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Invariant Sections being "Funding Free Software", the Front-Cover
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(see below). A copy of the license is included in the section entitled
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"GNU Free Documentation License".
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(a) The FSF's Front-Cover Text is:
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A GNU Manual
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(b) The FSF's Back-Cover Text is:
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<!-- Created by GNU Texinfo 5.2, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>Using the GNU Compiler Collection (GCC): RX Options</title>
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<meta name="description" content="Using the GNU Compiler Collection (GCC): RX Options">
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<meta name="keywords" content="Using the GNU Compiler Collection (GCC): RX Options">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="Option-Index.html#Option-Index" rel="index" title="Option Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Submodel-Options.html#Submodel-Options" rel="up" title="Submodel Options">
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<link href="S_002f390-and-zSeries-Options.html#S_002f390-and-zSeries-Options" rel="next" title="S/390 and zSeries Options">
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<link href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" rel="prev" title="RS/6000 and PowerPC Options">
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="RX-Options"></a>
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<div class="header">
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<p>
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Next: <a href="S_002f390-and-zSeries-Options.html#S_002f390-and-zSeries-Options" accesskey="n" rel="next">S/390 and zSeries Options</a>, Previous: <a href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" accesskey="p" rel="prev">RS/6000 and PowerPC Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="RX-Options-1"></a>
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<h4 class="subsection">3.18.39 RX Options</h4>
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<a name="index-RX-Options"></a>
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<p>These command-line options are defined for RX targets:
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</p>
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<dl compact="compact">
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<dt><code>-m64bit-doubles</code></dt>
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<dt><code>-m32bit-doubles</code></dt>
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<dd><a name="index-m64bit_002ddoubles-1"></a>
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<a name="index-m32bit_002ddoubles-1"></a>
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<p>Make the <code>double</code> data type be 64 bits (<samp>-m64bit-doubles</samp>)
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or 32 bits (<samp>-m32bit-doubles</samp>) in size. The default is
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<samp>-m32bit-doubles</samp>. <em>Note</em> RX floating-point hardware only
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works on 32-bit values, which is why the default is
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<samp>-m32bit-doubles</samp>.
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</p>
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</dd>
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<dt><code>-fpu</code></dt>
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<dt><code>-nofpu</code></dt>
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<dd><a name="index-fpu"></a>
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<a name="index-nofpu"></a>
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<p>Enables (<samp>-fpu</samp>) or disables (<samp>-nofpu</samp>) the use of RX
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floating-point hardware. The default is enabled for the RX600
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series and disabled for the RX200 series.
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</p>
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<p>Floating-point instructions are only generated for 32-bit floating-point
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values, however, so the FPU hardware is not used for doubles if the
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<samp>-m64bit-doubles</samp> option is used.
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</p>
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<p><em>Note</em> If the <samp>-fpu</samp> option is enabled then
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<samp>-funsafe-math-optimizations</samp> is also enabled automatically.
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This is because the RX FPU instructions are themselves unsafe.
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</p>
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</dd>
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<dt><code>-mcpu=<var>name</var></code></dt>
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<dd><a name="index-mcpu-10"></a>
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<p>Selects the type of RX CPU to be targeted. Currently three types are
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supported, the generic ‘<samp>RX600</samp>’ and ‘<samp>RX200</samp>’ series hardware and
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the specific ‘<samp>RX610</samp>’ CPU. The default is ‘<samp>RX600</samp>’.
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</p>
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<p>The only difference between ‘<samp>RX600</samp>’ and ‘<samp>RX610</samp>’ is that the
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‘<samp>RX610</samp>’ does not support the <code>MVTIPL</code> instruction.
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</p>
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<p>The ‘<samp>RX200</samp>’ series does not have a hardware floating-point unit
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and so <samp>-nofpu</samp> is enabled by default when this type is
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selected.
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</p>
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</dd>
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<dt><code>-mbig-endian-data</code></dt>
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<dt><code>-mlittle-endian-data</code></dt>
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<dd><a name="index-mbig_002dendian_002ddata"></a>
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<a name="index-mlittle_002dendian_002ddata"></a>
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<p>Store data (but not code) in the big-endian format. The default is
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<samp>-mlittle-endian-data</samp>, i.e. to store data in the little-endian
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format.
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</p>
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</dd>
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<dt><code>-msmall-data-limit=<var>N</var></code></dt>
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<dd><a name="index-msmall_002ddata_002dlimit"></a>
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<p>Specifies the maximum size in bytes of global and static variables
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which can be placed into the small data area. Using the small data
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area can lead to smaller and faster code, but the size of area is
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limited and it is up to the programmer to ensure that the area does
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not overflow. Also when the small data area is used one of the RX’s
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registers (usually <code>r13</code>) is reserved for use pointing to this
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area, so it is no longer available for use by the compiler. This
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could result in slower and/or larger code if variables are pushed onto
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the stack instead of being held in this register.
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</p>
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<p>Note, common variables (variables that have not been initialized) and
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constants are not placed into the small data area as they are assigned
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to other sections in the output executable.
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</p>
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<p>The default value is zero, which disables this feature. Note, this
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feature is not enabled by default with higher optimization levels
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(<samp>-O2</samp> etc) because of the potentially detrimental effects of
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reserving a register. It is up to the programmer to experiment and
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discover whether this feature is of benefit to their program. See the
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description of the <samp>-mpid</samp> option for a description of how the
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actual register to hold the small data area pointer is chosen.
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</p>
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</dd>
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<dt><code>-msim</code></dt>
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<dt><code>-mno-sim</code></dt>
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<dd><a name="index-msim-9"></a>
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<a name="index-mno_002dsim"></a>
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<p>Use the simulator runtime. The default is to use the libgloss
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board-specific runtime.
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</p>
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</dd>
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<dt><code>-mas100-syntax</code></dt>
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<dt><code>-mno-as100-syntax</code></dt>
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<dd><a name="index-mas100_002dsyntax"></a>
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<a name="index-mno_002das100_002dsyntax"></a>
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<p>When generating assembler output use a syntax that is compatible with
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Renesas’s AS100 assembler. This syntax can also be handled by the GAS
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assembler, but it has some restrictions so it is not generated by default.
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</p>
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</dd>
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<dt><code>-mmax-constant-size=<var>N</var></code></dt>
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<dd><a name="index-mmax_002dconstant_002dsize"></a>
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<p>Specifies the maximum size, in bytes, of a constant that can be used as
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an operand in a RX instruction. Although the RX instruction set does
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allow constants of up to 4 bytes in length to be used in instructions,
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a longer value equates to a longer instruction. Thus in some
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circumstances it can be beneficial to restrict the size of constants
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that are used in instructions. Constants that are too big are instead
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placed into a constant pool and referenced via register indirection.
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</p>
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<p>The value <var>N</var> can be between 0 and 4. A value of 0 (the default)
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or 4 means that constants of any size are allowed.
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</p>
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</dd>
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<dt><code>-mrelax</code></dt>
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<dd><a name="index-mrelax-5"></a>
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<p>Enable linker relaxation. Linker relaxation is a process whereby the
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linker attempts to reduce the size of a program by finding shorter
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versions of various instructions. Disabled by default.
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</p>
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</dd>
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<dt><code>-mint-register=<var>N</var></code></dt>
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<dd><a name="index-mint_002dregister"></a>
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<p>Specify the number of registers to reserve for fast interrupt handler
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functions. The value <var>N</var> can be between 0 and 4. A value of 1
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means that register <code>r13</code> is reserved for the exclusive use
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of fast interrupt handlers. A value of 2 reserves <code>r13</code> and
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<code>r12</code>. A value of 3 reserves <code>r13</code>, <code>r12</code> and
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<code>r11</code>, and a value of 4 reserves <code>r13</code> through <code>r10</code>.
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A value of 0, the default, does not reserve any registers.
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</p>
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</dd>
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<dt><code>-msave-acc-in-interrupts</code></dt>
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<dd><a name="index-msave_002dacc_002din_002dinterrupts"></a>
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<p>Specifies that interrupt handler functions should preserve the
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accumulator register. This is only necessary if normal code might use
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the accumulator register, for example because it performs 64-bit
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multiplications. The default is to ignore the accumulator as this
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makes the interrupt handlers faster.
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</p>
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</dd>
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<dt><code>-mpid</code></dt>
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<dt><code>-mno-pid</code></dt>
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<dd><a name="index-mpid"></a>
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<a name="index-mno_002dpid"></a>
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<p>Enables the generation of position independent data. When enabled any
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access to constant data is done via an offset from a base address
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held in a register. This allows the location of constant data to be
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determined at run time without requiring the executable to be
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relocated, which is a benefit to embedded applications with tight
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memory constraints. Data that can be modified is not affected by this
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option.
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</p>
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<p>Note, using this feature reserves a register, usually <code>r13</code>, for
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the constant data base address. This can result in slower and/or
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larger code, especially in complicated functions.
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</p>
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<p>The actual register chosen to hold the constant data base address
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depends upon whether the <samp>-msmall-data-limit</samp> and/or the
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<samp>-mint-register</samp> command-line options are enabled. Starting
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with register <code>r13</code> and proceeding downwards, registers are
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allocated first to satisfy the requirements of <samp>-mint-register</samp>,
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then <samp>-mpid</samp> and finally <samp>-msmall-data-limit</samp>. Thus it
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is possible for the small data area register to be <code>r8</code> if both
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<samp>-mint-register=4</samp> and <samp>-mpid</samp> are specified on the
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command line.
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</p>
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<p>By default this feature is not enabled. The default can be restored
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via the <samp>-mno-pid</samp> command-line option.
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</p>
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</dd>
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<dt><code>-mno-warn-multiple-fast-interrupts</code></dt>
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<dt><code>-mwarn-multiple-fast-interrupts</code></dt>
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<dd><a name="index-mno_002dwarn_002dmultiple_002dfast_002dinterrupts"></a>
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<a name="index-mwarn_002dmultiple_002dfast_002dinterrupts"></a>
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<p>Prevents GCC from issuing a warning message if it finds more than one
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fast interrupt handler when it is compiling a file. The default is to
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issue a warning for each extra fast interrupt handler found, as the RX
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only supports one such interrupt.
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</p>
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</dd>
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<dt><code>-mallow-string-insns</code></dt>
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<dt><code>-mno-allow-string-insns</code></dt>
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<dd><a name="index-mallow_002dstring_002dinsns"></a>
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<a name="index-mno_002dallow_002dstring_002dinsns"></a>
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<p>Enables or disables the use of the string manipulation instructions
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<code>SMOVF</code>, <code>SCMPU</code>, <code>SMOVB</code>, <code>SMOVU</code>, <code>SUNTIL</code>
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<code>SWHILE</code> and also the <code>RMPA</code> instruction. These
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instructions may prefetch data, which is not safe to do if accessing
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an I/O register. (See section 12.2.7 of the RX62N Group User’s Manual
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for more information).
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</p>
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<p>The default is to allow these instructions, but it is not possible for
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GCC to reliably detect all circumstances where a string instruction
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might be used to access an I/O register, so their use cannot be
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disabled automatically. Instead it is reliant upon the programmer to
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use the <samp>-mno-allow-string-insns</samp> option if their program
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accesses I/O space.
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</p>
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<p>When the instructions are enabled GCC defines the C preprocessor
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symbol <code>__RX_ALLOW_STRING_INSNS__</code>, otherwise it defines the
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symbol <code>__RX_DISALLOW_STRING_INSNS__</code>.
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</p>
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</dd>
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<dt><code>-mjsr</code></dt>
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<dt><code>-mno-jsr</code></dt>
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<dd><a name="index-mjsr"></a>
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<a name="index-mno_002djsr"></a>
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<p>Use only (or not only) <code>JSR</code> instructions to access functions.
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This option can be used when code size exceeds the range of <code>BSR</code>
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instructions. Note that <samp>-mno-jsr</samp> does not mean to not use
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<code>JSR</code> but instead means that any type of branch may be used.
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</p></dd>
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</dl>
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<p><em>Note:</em> The generic GCC command-line option <samp>-ffixed-<var>reg</var></samp>
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|
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has special significance to the RX port when used with the
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|
|
<code>interrupt</code> function attribute. This attribute indicates a
|
||
|
|
function intended to process fast interrupts. GCC ensures
|
||
|
|
that it only uses the registers <code>r10</code>, <code>r11</code>, <code>r12</code>
|
||
|
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and/or <code>r13</code> and only provided that the normal use of the
|
||
|
|
corresponding registers have been restricted via the
|
||
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<samp>-ffixed-<var>reg</var></samp> or <samp>-mint-register</samp> command-line
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||
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options.
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</p>
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<hr>
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<div class="header">
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<p>
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Next: <a href="S_002f390-and-zSeries-Options.html#S_002f390-and-zSeries-Options" accesskey="n" rel="next">S/390 and zSeries Options</a>, Previous: <a href="RS_002f6000-and-PowerPC-Options.html#RS_002f6000-and-PowerPC-Options" accesskey="p" rel="prev">RS/6000 and PowerPC Options</a>, Up: <a href="Submodel-Options.html#Submodel-Options" accesskey="u" rel="up">Submodel Options</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Option-Index.html#Option-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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</body>
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