177 lines
9.4 KiB
HTML
177 lines
9.4 KiB
HTML
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<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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<html>
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<!-- This file documents the GNU Assembler "as".
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Copyright (C) 1991-2016 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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<!-- Created by GNU Texinfo 5.2, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>Using as: i386-Regs</title>
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<meta name="description" content="Using as: i386-Regs">
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<meta name="keywords" content="Using as: i386-Regs">
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<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="i386_002dDependent.html#i386_002dDependent" rel="up" title="i386-Dependent">
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<link href="i386_002dPrefixes.html#i386_002dPrefixes" rel="next" title="i386-Prefixes">
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<link href="i386_002dMnemonics.html#i386_002dMnemonics" rel="prev" title="i386-Mnemonics">
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="i386_002dRegs"></a>
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<div class="header">
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<p>
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Next: <a href="i386_002dPrefixes.html#i386_002dPrefixes" accesskey="n" rel="next">i386-Prefixes</a>, Previous: <a href="i386_002dMnemonics.html#i386_002dMnemonics" accesskey="p" rel="prev">i386-Mnemonics</a>, Up: <a href="i386_002dDependent.html#i386_002dDependent" accesskey="u" rel="up">i386-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Register-Naming"></a>
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<h4 class="subsection">9.15.5 Register Naming</h4>
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<a name="index-i386-registers"></a>
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<a name="index-registers_002c-i386"></a>
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<a name="index-x86_002d64-registers"></a>
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<a name="index-registers_002c-x86_002d64"></a>
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<p>Register operands are always prefixed with ‘<samp>%</samp>’. The 80386 registers
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consist of
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</p>
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<ul>
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<li> the 8 32-bit registers ‘<samp>%eax</samp>’ (the accumulator), ‘<samp>%ebx</samp>’,
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‘<samp>%ecx</samp>’, ‘<samp>%edx</samp>’, ‘<samp>%edi</samp>’, ‘<samp>%esi</samp>’, ‘<samp>%ebp</samp>’ (the
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frame pointer), and ‘<samp>%esp</samp>’ (the stack pointer).
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</li><li> the 8 16-bit low-ends of these: ‘<samp>%ax</samp>’, ‘<samp>%bx</samp>’, ‘<samp>%cx</samp>’,
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‘<samp>%dx</samp>’, ‘<samp>%di</samp>’, ‘<samp>%si</samp>’, ‘<samp>%bp</samp>’, and ‘<samp>%sp</samp>’.
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</li><li> the 8 8-bit registers: ‘<samp>%ah</samp>’, ‘<samp>%al</samp>’, ‘<samp>%bh</samp>’,
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‘<samp>%bl</samp>’, ‘<samp>%ch</samp>’, ‘<samp>%cl</samp>’, ‘<samp>%dh</samp>’, and ‘<samp>%dl</samp>’ (These
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are the high-bytes and low-bytes of ‘<samp>%ax</samp>’, ‘<samp>%bx</samp>’,
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‘<samp>%cx</samp>’, and ‘<samp>%dx</samp>’)
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</li><li> the 6 section registers ‘<samp>%cs</samp>’ (code section), ‘<samp>%ds</samp>’
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(data section), ‘<samp>%ss</samp>’ (stack section), ‘<samp>%es</samp>’, ‘<samp>%fs</samp>’,
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and ‘<samp>%gs</samp>’.
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</li><li> the 5 processor control registers ‘<samp>%cr0</samp>’, ‘<samp>%cr2</samp>’,
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‘<samp>%cr3</samp>’, ‘<samp>%cr4</samp>’, and ‘<samp>%cr8</samp>’.
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</li><li> the 6 debug registers ‘<samp>%db0</samp>’, ‘<samp>%db1</samp>’, ‘<samp>%db2</samp>’,
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‘<samp>%db3</samp>’, ‘<samp>%db6</samp>’, and ‘<samp>%db7</samp>’.
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</li><li> the 2 test registers ‘<samp>%tr6</samp>’ and ‘<samp>%tr7</samp>’.
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</li><li> the 8 floating point register stack ‘<samp>%st</samp>’ or equivalently
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‘<samp>%st(0)</samp>’, ‘<samp>%st(1)</samp>’, ‘<samp>%st(2)</samp>’, ‘<samp>%st(3)</samp>’,
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‘<samp>%st(4)</samp>’, ‘<samp>%st(5)</samp>’, ‘<samp>%st(6)</samp>’, and ‘<samp>%st(7)</samp>’.
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These registers are overloaded by 8 MMX registers ‘<samp>%mm0</samp>’,
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‘<samp>%mm1</samp>’, ‘<samp>%mm2</samp>’, ‘<samp>%mm3</samp>’, ‘<samp>%mm4</samp>’, ‘<samp>%mm5</samp>’,
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‘<samp>%mm6</samp>’ and ‘<samp>%mm7</samp>’.
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</li><li> the 8 128-bit SSE registers registers ‘<samp>%xmm0</samp>’, ‘<samp>%xmm1</samp>’, ‘<samp>%xmm2</samp>’,
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‘<samp>%xmm3</samp>’, ‘<samp>%xmm4</samp>’, ‘<samp>%xmm5</samp>’, ‘<samp>%xmm6</samp>’ and ‘<samp>%xmm7</samp>’.
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</li></ul>
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<p>The AMD x86-64 architecture extends the register set by:
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</p>
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<ul>
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<li> enhancing the 8 32-bit registers to 64-bit: ‘<samp>%rax</samp>’ (the
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accumulator), ‘<samp>%rbx</samp>’, ‘<samp>%rcx</samp>’, ‘<samp>%rdx</samp>’, ‘<samp>%rdi</samp>’,
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‘<samp>%rsi</samp>’, ‘<samp>%rbp</samp>’ (the frame pointer), ‘<samp>%rsp</samp>’ (the stack
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pointer)
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</li><li> the 8 extended registers ‘<samp>%r8</samp>’–‘<samp>%r15</samp>’.
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</li><li> the 8 32-bit low ends of the extended registers: ‘<samp>%r8d</samp>’–‘<samp>%r15d</samp>’.
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</li><li> the 8 16-bit low ends of the extended registers: ‘<samp>%r8w</samp>’–‘<samp>%r15w</samp>’.
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</li><li> the 8 8-bit low ends of the extended registers: ‘<samp>%r8b</samp>’–‘<samp>%r15b</samp>’.
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</li><li> the 4 8-bit registers: ‘<samp>%sil</samp>’, ‘<samp>%dil</samp>’, ‘<samp>%bpl</samp>’, ‘<samp>%spl</samp>’.
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</li><li> the 8 debug registers: ‘<samp>%db8</samp>’–‘<samp>%db15</samp>’.
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</li><li> the 8 128-bit SSE registers: ‘<samp>%xmm8</samp>’–‘<samp>%xmm15</samp>’.
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</li></ul>
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<p>With the AVX extensions more registers were made available:
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</p>
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<ul>
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<li> the 16 256-bit SSE ‘<samp>%ymm0</samp>’–‘<samp>%ymm15</samp>’ (only the first 8
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available in 32-bit mode). The bottom 128 bits are overlaid with the
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‘<samp>xmm0</samp>’–‘<samp>xmm15</samp>’ registers.
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</li></ul>
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<p>The AVX2 extensions made in 64-bit mode more registers available:
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</p>
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<ul>
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<li> the 16 128-bit registers ‘<samp>%xmm16</samp>’–‘<samp>%xmm31</samp>’ and the 16 256-bit
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registers ‘<samp>%ymm16</samp>’–‘<samp>%ymm31</samp>’.
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</li></ul>
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<p>The AVX512 extensions added the following registers:
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</p>
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<ul>
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<li> the 32 512-bit registers ‘<samp>%zmm0</samp>’–‘<samp>%zmm31</samp>’ (only the first 8
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available in 32-bit mode). The bottom 128 bits are overlaid with the
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‘<samp>%xmm0</samp>’–‘<samp>%xmm31</samp>’ registers and the first 256 bits are
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overlaid with the ‘<samp>%ymm0</samp>’–‘<samp>%ymm31</samp>’ registers.
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</li><li> the 8 mask registers ‘<samp>%k0</samp>’–‘<samp>%k7</samp>’.
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</li></ul>
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<hr>
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<div class="header">
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<p>
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Next: <a href="i386_002dPrefixes.html#i386_002dPrefixes" accesskey="n" rel="next">i386-Prefixes</a>, Previous: <a href="i386_002dMnemonics.html#i386_002dMnemonics" accesskey="p" rel="prev">i386-Mnemonics</a>, Up: <a href="i386_002dDependent.html#i386_002dDependent" accesskey="u" rel="up">i386-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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