241 lines
8.8 KiB
HTML
241 lines
8.8 KiB
HTML
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<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
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<html>
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<!-- This file documents the GNU Assembler "as".
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Copyright (C) 1991-2016 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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Back-Cover Texts. A copy of the license is included in the
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section entitled "GNU Free Documentation License".
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<!-- Created by GNU Texinfo 5.2, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>Using as: NDS32-Ops</title>
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<meta name="description" content="Using as: NDS32-Ops">
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<meta name="keywords" content="Using as: NDS32-Ops">
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<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
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<link href="index.html#Top" rel="start" title="Top">
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="NDS32-Syntax.html#NDS32-Syntax" rel="up" title="NDS32 Syntax">
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<link href="NiosII_002dDependent.html#NiosII_002dDependent" rel="next" title="NiosII-Dependent">
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<link href="NDS32_002dRegs.html#NDS32_002dRegs" rel="prev" title="NDS32-Regs">
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="NDS32_002dOps"></a>
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<div class="header">
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<p>
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Previous: <a href="NDS32_002dRegs.html#NDS32_002dRegs" accesskey="p" rel="prev">NDS32-Regs</a>, Up: <a href="NDS32-Syntax.html#NDS32-Syntax" accesskey="u" rel="up">NDS32 Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Pseudo-Instructions"></a>
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<h4 class="subsubsection">9.30.2.3 Pseudo Instructions</h4>
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<dl compact="compact">
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<dt><code>li rt5,imm32</code></dt>
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<dd><p>load 32-bit integer into register rt5. ‘<samp>sethi rt5,hi20(imm32)</samp>’ and then
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‘<samp>ori rt5,reg,lo12(imm32)</samp>’.
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</p>
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</dd>
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<dt><code>la rt5,var</code></dt>
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<dd><p>Load 32-bit address of var into register rt5. ‘<samp>sethi rt5,hi20(var)</samp>’ and
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then ‘<samp>ori reg,rt5,lo12(var)</samp>’
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</p>
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</dd>
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<dt><code>l.[bhw] rt5,var</code></dt>
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<dd><p>Load value of var into register rt5. ‘<samp>sethi $ta,hi20(var)</samp>’ and then
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‘<samp>l[bhw]i rt5,[$ta+lo12(var)]</samp>’
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</p>
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</dd>
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<dt><code>l.[bh]s rt5,var</code></dt>
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<dd><p>Load value of var into register rt5. ‘<samp>sethi $ta,hi20(var)</samp>’ and then
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‘<samp>l[bh]si rt5,[$ta+lo12(var)]</samp>’
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</p>
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</dd>
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<dt><code>l.[bhw]p rt5,var,inc</code></dt>
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<dd><p>Load value of var into register rt5 and increment $ta by amount inc.
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‘<samp>la $ta,var</samp>’ and then ‘<samp>l[bhw]i.bi rt5,[$ta],inc</samp>’
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</p>
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</dd>
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<dt><code>l.[bhw]pc rt5,inc</code></dt>
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<dd><p>Continue loading value of var into register rt5 and increment $ta by amount inc.
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‘<samp>l[bhw]i.bi rt5,[$ta],inc.</samp>’
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</p>
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</dd>
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<dt><code>l.[bh]sp rt5,var,inc</code></dt>
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<dd><p>Load value of var into register rt5 and increment $ta by amount inc.
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‘<samp>la $ta,var</samp>’ and then ‘<samp>l[bh]si.bi rt5,[$ta],inc</samp>’
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</p>
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</dd>
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<dt><code>l.[bh]spc rt5,inc</code></dt>
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<dd><p>Continue loading value of var into register rt5 and increment $ta by amount inc.
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‘<samp>l[bh]si.bi rt5,[$ta],inc.</samp>’
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</p>
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</dd>
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<dt><code>s.[bhw] rt5,var</code></dt>
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<dd><p>Store register rt5 to var.
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‘<samp>sethi $ta,hi20(var)</samp>’ and then ‘<samp>s[bhw]i rt5,[$ta+lo12(var)]</samp>’
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</p>
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</dd>
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<dt><code>s.[bhw]p rt5,var,inc</code></dt>
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<dd><p>Store register rt5 to var and increment $ta by amount inc.
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‘<samp>la $ta,var</samp>’ and then ‘<samp>s[bhw]i.bi rt5,[$ta],inc</samp>’
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</p>
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</dd>
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<dt><code>s.[bhw]pc rt5,inc</code></dt>
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<dd><p>Continue storing register rt5 to var and increment $ta by amount inc.
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‘<samp>s[bhw]i.bi rt5,[$ta],inc.</samp>’
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</p>
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</dd>
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<dt><code>not rt5,ra5</code></dt>
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<dd><p>Alias of ‘<samp>nor rt5,ra5,ra5</samp>’.
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</p>
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</dd>
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<dt><code>neg rt5,ra5</code></dt>
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<dd><p>Alias of ‘<samp>subri rt5,ra5,0</samp>’.
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</p>
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</dd>
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<dt><code>br rb5</code></dt>
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<dd><p>Depending on how it is assembled, it is translated into ‘<samp>r5 rb5</samp>’
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or ‘<samp>jr rb5</samp>’.
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</p>
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</dd>
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<dt><code>b label</code></dt>
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<dd><p>Branch to label depending on how it is assembled, it is translated into
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‘<samp>j8 label</samp>’, ‘<samp>j label</samp>’, or "‘<samp>la $ta,label</samp>’ ‘<samp>br $ta</samp>’".
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</p>
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</dd>
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<dt><code>bral rb5</code></dt>
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<dd><p>Alias of jral br5 depending on how it is assembled, it is translated
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into ‘<samp>jral5 rb5</samp>’ or ‘<samp>jral rb5</samp>’.
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</p>
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</dd>
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<dt><code>bal fname</code></dt>
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<dd><p>Alias of jal fname depending on how it is assembled, it is translated into
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‘<samp>jal fname</samp>’ or "‘<samp>la $ta,fname</samp>’ ‘<samp>bral $ta</samp>’".
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</p>
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</dd>
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<dt><code>call fname</code></dt>
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<dd><p>Call function fname same as ‘<samp>jal fname</samp>’.
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</p>
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</dd>
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<dt><code>move rt5,ra5</code></dt>
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<dd><p>For 16-bit, this is ‘<samp>mov55 rt5,ra5</samp>’.
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For no 16-bit, this is ‘<samp>ori rt5,ra5,0</samp>’.
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</p>
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</dd>
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<dt><code>move rt5,var</code></dt>
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<dd><p>This is the same as ‘<samp>l.w rt5,var</samp>’.
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</p>
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</dd>
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<dt><code>move rt5,imm32</code></dt>
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<dd><p>This is the same as ‘<samp>li rt5,imm32</samp>’.
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</p>
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</dd>
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<dt><code>pushm ra5,rb5</code></dt>
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<dd><p>Push contents of registers from ra5 to rb5 into stack.
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</p>
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</dd>
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<dt><code>push ra5</code></dt>
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<dd><p>Push content of register ra5 into stack. (same ‘<samp>pushm ra5,ra5</samp>’).
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</p>
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</dd>
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<dt><code>push.d var</code></dt>
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<dd><p>Push value of double-word variable var into stack.
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</p>
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</dd>
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<dt><code>push.w var</code></dt>
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<dd><p>Push value of word variable var into stack.
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</p>
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</dd>
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<dt><code>push.h var</code></dt>
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<dd><p>Push value of half-word variable var into stack.
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</p>
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</dd>
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<dt><code>push.b var</code></dt>
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<dd><p>Push value of byte variable var into stack.
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</p>
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</dd>
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<dt><code>pusha var</code></dt>
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<dd><p>Push 32-bit address of variable var into stack.
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</p>
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</dd>
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<dt><code>pushi imm32</code></dt>
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<dd><p>Push 32-bit immediate value into stack.
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</p>
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</dd>
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<dt><code>popm ra5,rb5</code></dt>
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<dd><p>Pop top of stack values into registers ra5 to rb5.
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</p>
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</dd>
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<dt><code>pop rt5</code></dt>
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<dd><p>Pop top of stack value into register. (same as ‘<samp>popm rt5,rt5</samp>’.)
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</p>
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</dd>
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<dt><code>pop.d var,ra5</code></dt>
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<dd><p>Pop value of double-word variable var from stack using register ra5
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as 2nd scratch register. (1st is $ta)
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</p>
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</dd>
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<dt><code>pop.w var,ra5</code></dt>
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<dd><p>Pop value of word variable var from stack using register ra5.
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</p>
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</dd>
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<dt><code>pop.h var,ra5</code></dt>
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<dd><p>Pop value of half-word variable var from stack using register ra5.
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</p>
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</dd>
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<dt><code>pop.b var,ra5</code></dt>
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<dd><p>Pop value of byte variable var from stack using register ra5.
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</p>
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</dd>
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</dl>
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<hr>
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<div class="header">
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<p>
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Previous: <a href="NDS32_002dRegs.html#NDS32_002dRegs" accesskey="p" rel="prev">NDS32-Regs</a>, Up: <a href="NDS32-Syntax.html#NDS32-Syntax" accesskey="u" rel="up">NDS32 Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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