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<!-- This file documents the GNU Assembler "as".
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Copyright (C) 1991-2016 Free Software Foundation, Inc.
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Permission is granted to copy, distribute and/or modify this document
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under the terms of the GNU Free Documentation License, Version 1.3
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or any later version published by the Free Software Foundation;
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with no Invariant Sections, with no Front-Cover Texts, and with no
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<!-- Created by GNU Texinfo 5.2, http://www.gnu.org/software/texinfo/ -->
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<head>
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<title>Using as: Sparc-Regs</title>
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<meta name="description" content="Using as: Sparc-Regs">
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<link href="AS-Index.html#AS-Index" rel="index" title="AS Index">
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<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents">
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<link href="Sparc_002dSyntax.html#Sparc_002dSyntax" rel="up" title="Sparc-Syntax">
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<link href="Sparc_002dConstants.html#Sparc_002dConstants" rel="next" title="Sparc-Constants">
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<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000">
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<a name="Sparc_002dRegs"></a>
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<div class="header">
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<p>
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Next: <a href="Sparc_002dConstants.html#Sparc_002dConstants" accesskey="n" rel="next">Sparc-Constants</a>, Previous: <a href="Sparc_002dChars.html#Sparc_002dChars" accesskey="p" rel="prev">Sparc-Chars</a>, Up: <a href="Sparc_002dSyntax.html#Sparc_002dSyntax" accesskey="u" rel="up">Sparc-Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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</div>
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<hr>
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<a name="Register-Names-15"></a>
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<h4 class="subsubsection">9.42.3.2 Register Names</h4>
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<a name="index-Sparc-registers"></a>
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<a name="index-register-names_002c-Sparc"></a>
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<p>The Sparc integer register file is broken down into global,
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outgoing, local, and incoming.
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</p>
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<ul>
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<li> The 8 global registers are referred to as ‘<samp>%g<var>n</var></samp>’.
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</li><li> The 8 outgoing registers are referred to as ‘<samp>%o<var>n</var></samp>’.
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</li><li> The 8 local registers are referred to as ‘<samp>%l<var>n</var></samp>’.
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</li><li> The 8 incoming registers are referred to as ‘<samp>%i<var>n</var></samp>’.
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</li><li> The frame pointer register ‘<samp>%i6</samp>’ can be referenced using
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the alias ‘<samp>%fp</samp>’.
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</li><li> The stack pointer register ‘<samp>%o6</samp>’ can be referenced using
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the alias ‘<samp>%sp</samp>’.
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</li></ul>
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<p>Floating point registers are simply referred to as ‘<samp>%f<var>n</var></samp>’.
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When assembling for pre-V9, only 32 floating point registers
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are available. For V9 and later there are 64, but there are
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restrictions when referencing the upper 32 registers. They
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can only be accessed as double or quad, and thus only even
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or quad numbered accesses are allowed. For example, ‘<samp>%f34</samp>’
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is a legal floating point register, but ‘<samp>%f35</samp>’ is not.
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</p>
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<p>Floating point registers accessed as double can also be referred using
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the ‘<samp>%d<var>n</var></samp>’ notation, where <var>n</var> is even. Similarly,
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floating point registers accessed as quad can be referred using the
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‘<samp>%q<var>n</var></samp>’ notation, where <var>n</var> is a multiple of 4. For
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example, ‘<samp>%f4</samp>’ can be denoted as both ‘<samp>%d4</samp>’ and ‘<samp>%q4</samp>’.
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On the other hand, ‘<samp>%f2</samp>’ can be denoted as ‘<samp>%d2</samp>’ but not as
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‘<samp>%q2</samp>’.
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</p>
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<p>Certain V9 instructions allow access to ancillary state registers.
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Most simply they can be referred to as ‘<samp>%asr<var>n</var></samp>’ where
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<var>n</var> can be from 16 to 31. However, there are some aliases
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defined to reference ASR registers defined for various UltraSPARC
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processors:
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</p>
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<ul>
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<li> The tick compare register is referred to as ‘<samp>%tick_cmpr</samp>’.
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</li><li> The system tick register is referred to as ‘<samp>%stick</samp>’. An alias,
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‘<samp>%sys_tick</samp>’, exists but is deprecated and should not be used
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by new software.
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</li><li> The system tick compare register is referred to as ‘<samp>%stick_cmpr</samp>’.
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An alias, ‘<samp>%sys_tick_cmpr</samp>’, exists but is deprecated and should
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not be used by new software.
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</li><li> The software interrupt register is referred to as ‘<samp>%softint</samp>’.
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</li><li> The set software interrupt register is referred to as ‘<samp>%set_softint</samp>’.
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The mnemonic ‘<samp>%softint_set</samp>’ is provided as an alias.
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</li><li> The clear software interrupt register is referred to as
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‘<samp>%clear_softint</samp>’. The mnemonic ‘<samp>%softint_clear</samp>’ is provided
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as an alias.
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</li><li> The performance instrumentation counters register is referred to as
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‘<samp>%pic</samp>’.
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</li><li> The performance control register is referred to as ‘<samp>%pcr</samp>’.
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</li><li> The graphics status register is referred to as ‘<samp>%gsr</samp>’.
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</li><li> The V9 dispatch control register is referred to as ‘<samp>%dcr</samp>’.
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</li></ul>
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<p>Various V9 branch and conditional move instructions allow
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specification of which set of integer condition codes to
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test. These are referred to as ‘<samp>%xcc</samp>’ and ‘<samp>%icc</samp>’.
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</p>
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<p>Additionally, GAS supports the so-called “natural” condition codes;
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these are referred to as ‘<samp>%ncc</samp>’ and reference to ‘<samp>%icc</samp>’ if
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the word size is 32, ‘<samp>%xcc</samp>’ if the word size is 64.
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</p>
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<p>In V9, there are 4 sets of floating point condition codes
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which are referred to as ‘<samp>%fcc<var>n</var></samp>’.
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</p>
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<p>Several special privileged and non-privileged registers
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exist:
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</p>
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<ul>
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<li> The V9 address space identifier register is referred to as ‘<samp>%asi</samp>’.
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</li><li> The V9 restorable windows register is referred to as ‘<samp>%canrestore</samp>’.
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</li><li> The V9 savable windows register is referred to as ‘<samp>%cansave</samp>’.
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</li><li> The V9 clean windows register is referred to as ‘<samp>%cleanwin</samp>’.
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</li><li> The V9 current window pointer register is referred to as ‘<samp>%cwp</samp>’.
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</li><li> The floating-point queue register is referred to as ‘<samp>%fq</samp>’.
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</li><li> The V8 co-processor queue register is referred to as ‘<samp>%cq</samp>’.
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</li><li> The floating point status register is referred to as ‘<samp>%fsr</samp>’.
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</li><li> The other windows register is referred to as ‘<samp>%otherwin</samp>’.
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</li><li> The V9 program counter register is referred to as ‘<samp>%pc</samp>’.
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</li><li> The V9 next program counter register is referred to as ‘<samp>%npc</samp>’.
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</li><li> The V9 processor interrupt level register is referred to as ‘<samp>%pil</samp>’.
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</li><li> The V9 processor state register is referred to as ‘<samp>%pstate</samp>’.
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</li><li> The trap base address register is referred to as ‘<samp>%tba</samp>’.
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</li><li> The V9 tick register is referred to as ‘<samp>%tick</samp>’.
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</li><li> The V9 trap level is referred to as ‘<samp>%tl</samp>’.
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</li><li> The V9 trap program counter is referred to as ‘<samp>%tpc</samp>’.
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</li><li> The V9 trap next program counter is referred to as ‘<samp>%tnpc</samp>’.
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</li><li> The V9 trap state is referred to as ‘<samp>%tstate</samp>’.
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</li><li> The V9 trap type is referred to as ‘<samp>%tt</samp>’.
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</li><li> The V9 condition codes is referred to as ‘<samp>%ccr</samp>’.
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</li><li> The V9 floating-point registers state is referred to as ‘<samp>%fprs</samp>’.
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</li><li> The V9 version register is referred to as ‘<samp>%ver</samp>’.
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</li><li> The V9 window state register is referred to as ‘<samp>%wstate</samp>’.
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</li><li> The Y register is referred to as ‘<samp>%y</samp>’.
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</li><li> The V8 window invalid mask register is referred to as ‘<samp>%wim</samp>’.
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</li><li> The V8 processor state register is referred to as ‘<samp>%psr</samp>’.
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</li><li> The V9 global register level register is referred to as ‘<samp>%gl</samp>’.
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</li></ul>
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<p>Several special register names exist for hypervisor mode code:
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</p>
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<ul>
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<li> The hyperprivileged processor state register is referred to as
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‘<samp>%hpstate</samp>’.
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</li><li> The hyperprivileged trap state register is referred to as ‘<samp>%htstate</samp>’.
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</li><li> The hyperprivileged interrupt pending register is referred to as
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‘<samp>%hintp</samp>’.
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</li><li> The hyperprivileged trap base address register is referred to as
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‘<samp>%htba</samp>’.
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</li><li> The hyperprivileged implementation version register is referred
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to as ‘<samp>%hver</samp>’.
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</li><li> The hyperprivileged system tick offset register is referred to as
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‘<samp>%hstick_offset</samp>’. Note that there is no ‘<samp>%hstick</samp>’ register,
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the normal ‘<samp>%stick</samp>’ is used.
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</li><li> The hyperprivileged system tick enable register is referred to as
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‘<samp>%hstick_enable</samp>’.
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</li><li> The hyperprivileged system tick compare register is referred
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to as ‘<samp>%hstick_cmpr</samp>’.
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</li></ul>
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<hr>
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<div class="header">
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<p>
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Next: <a href="Sparc_002dConstants.html#Sparc_002dConstants" accesskey="n" rel="next">Sparc-Constants</a>, Previous: <a href="Sparc_002dChars.html#Sparc_002dChars" accesskey="p" rel="prev">Sparc-Chars</a>, Up: <a href="Sparc_002dSyntax.html#Sparc_002dSyntax" accesskey="u" rel="up">Sparc-Syntax</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
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