728 lines
18 KiB
C
728 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* wm8804.c -- WM8804 S/PDIF transceiver driver
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*
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* Copyright 2010-11 Wolfson Microelectronics plc
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*
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* Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/gpio/consumer.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/of_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include <sound/soc-dapm.h>
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#include "wm8804.h"
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#define WM8804_NUM_SUPPLIES 2
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static const char *wm8804_supply_names[WM8804_NUM_SUPPLIES] = {
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"PVDD",
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"DVDD"
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};
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static const struct reg_default wm8804_reg_defaults[] = {
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{ 3, 0x21 }, /* R3 - PLL1 */
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{ 4, 0xFD }, /* R4 - PLL2 */
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{ 5, 0x36 }, /* R5 - PLL3 */
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{ 6, 0x07 }, /* R6 - PLL4 */
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{ 7, 0x16 }, /* R7 - PLL5 */
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{ 8, 0x18 }, /* R8 - PLL6 */
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{ 9, 0xFF }, /* R9 - SPDMODE */
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{ 10, 0x00 }, /* R10 - INTMASK */
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{ 18, 0x00 }, /* R18 - SPDTX1 */
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{ 19, 0x00 }, /* R19 - SPDTX2 */
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{ 20, 0x00 }, /* R20 - SPDTX3 */
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{ 21, 0x71 }, /* R21 - SPDTX4 */
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{ 22, 0x0B }, /* R22 - SPDTX5 */
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{ 23, 0x70 }, /* R23 - GPO0 */
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{ 24, 0x57 }, /* R24 - GPO1 */
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{ 26, 0x42 }, /* R26 - GPO2 */
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{ 27, 0x06 }, /* R27 - AIFTX */
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{ 28, 0x06 }, /* R28 - AIFRX */
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{ 29, 0x80 }, /* R29 - SPDRX1 */
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{ 30, 0x07 }, /* R30 - PWRDN */
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};
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struct wm8804_priv {
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struct device *dev;
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struct regmap *regmap;
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struct regulator_bulk_data supplies[WM8804_NUM_SUPPLIES];
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struct notifier_block disable_nb[WM8804_NUM_SUPPLIES];
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int mclk_div;
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struct gpio_desc *reset;
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int aif_pwr;
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};
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static int txsrc_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol);
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static int wm8804_aif_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event);
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/*
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* We can't use the same notifier block for more than one supply and
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* there's no way I can see to get from a callback to the caller
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* except container_of().
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*/
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#define WM8804_REGULATOR_EVENT(n) \
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static int wm8804_regulator_event_##n(struct notifier_block *nb, \
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unsigned long event, void *data) \
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{ \
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struct wm8804_priv *wm8804 = container_of(nb, struct wm8804_priv, \
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disable_nb[n]); \
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if (event & REGULATOR_EVENT_DISABLE) { \
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regcache_mark_dirty(wm8804->regmap); \
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} \
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return 0; \
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}
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WM8804_REGULATOR_EVENT(0)
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WM8804_REGULATOR_EVENT(1)
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static const char *txsrc_text[] = { "S/PDIF RX", "AIF" };
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static SOC_ENUM_SINGLE_DECL(txsrc, WM8804_SPDTX4, 6, txsrc_text);
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static const struct snd_kcontrol_new wm8804_tx_source_mux[] = {
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SOC_DAPM_ENUM_EXT("Input Source", txsrc,
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snd_soc_dapm_get_enum_double, txsrc_put),
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};
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static const struct snd_soc_dapm_widget wm8804_dapm_widgets[] = {
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SND_SOC_DAPM_OUTPUT("SPDIF Out"),
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SND_SOC_DAPM_INPUT("SPDIF In"),
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SND_SOC_DAPM_PGA("SPDIFTX", WM8804_PWRDN, 2, 1, NULL, 0),
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SND_SOC_DAPM_PGA("SPDIFRX", WM8804_PWRDN, 1, 1, NULL, 0),
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SND_SOC_DAPM_MUX("Tx Source", SND_SOC_NOPM, 6, 0, wm8804_tx_source_mux),
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SND_SOC_DAPM_AIF_OUT_E("AIFTX", NULL, 0, SND_SOC_NOPM, 0, 0, wm8804_aif_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
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SND_SOC_DAPM_AIF_IN_E("AIFRX", NULL, 0, SND_SOC_NOPM, 0, 0, wm8804_aif_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
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};
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static const struct snd_soc_dapm_route wm8804_dapm_routes[] = {
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{ "AIFRX", NULL, "Playback" },
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{ "Tx Source", "AIF", "AIFRX" },
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{ "SPDIFRX", NULL, "SPDIF In" },
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{ "Tx Source", "S/PDIF RX", "SPDIFRX" },
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{ "SPDIFTX", NULL, "Tx Source" },
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{ "SPDIF Out", NULL, "SPDIFTX" },
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{ "AIFTX", NULL, "SPDIFRX" },
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{ "Capture", NULL, "AIFTX" },
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};
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static int wm8804_aif_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
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struct wm8804_priv *wm8804 = snd_soc_component_get_drvdata(component);
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switch (event) {
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case SND_SOC_DAPM_POST_PMU:
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/* power up the aif */
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if (!wm8804->aif_pwr)
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snd_soc_component_update_bits(component, WM8804_PWRDN, 0x10, 0x0);
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wm8804->aif_pwr++;
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break;
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case SND_SOC_DAPM_POST_PMD:
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/* power down only both paths are disabled */
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wm8804->aif_pwr--;
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if (!wm8804->aif_pwr)
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snd_soc_component_update_bits(component, WM8804_PWRDN, 0x10, 0x10);
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break;
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}
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return 0;
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}
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static int txsrc_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
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struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
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struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
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unsigned int val = ucontrol->value.enumerated.item[0] << e->shift_l;
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unsigned int mask = 1 << e->shift_l;
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unsigned int txpwr;
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if (val != 0 && val != mask)
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return -EINVAL;
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snd_soc_dapm_mutex_lock(dapm);
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if (snd_soc_component_test_bits(component, e->reg, mask, val)) {
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/* save the current power state of the transmitter */
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txpwr = snd_soc_component_read(component, WM8804_PWRDN) & 0x4;
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/* power down the transmitter */
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snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, 0x4);
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/* set the tx source */
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snd_soc_component_update_bits(component, e->reg, mask, val);
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/* restore the transmitter's configuration */
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snd_soc_component_update_bits(component, WM8804_PWRDN, 0x4, txpwr);
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}
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snd_soc_dapm_mutex_unlock(dapm);
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return 0;
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}
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static bool wm8804_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case WM8804_RST_DEVID1:
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case WM8804_DEVID2:
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case WM8804_DEVREV:
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case WM8804_INTSTAT:
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case WM8804_SPDSTAT:
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case WM8804_RXCHAN1:
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case WM8804_RXCHAN2:
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case WM8804_RXCHAN3:
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case WM8804_RXCHAN4:
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case WM8804_RXCHAN5:
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return true;
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default:
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return false;
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}
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}
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static int wm8804_soft_reset(struct wm8804_priv *wm8804)
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{
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return regmap_write(wm8804->regmap, WM8804_RST_DEVID1, 0x0);
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}
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static int wm8804_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_component *component;
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u16 format, master, bcp, lrp;
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component = dai->component;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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format = 0x2;
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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format = 0x0;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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format = 0x1;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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case SND_SOC_DAIFMT_DSP_B:
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format = 0x3;
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break;
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default:
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dev_err(dai->dev, "Unknown dai format\n");
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return -EINVAL;
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}
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/* set data format */
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snd_soc_component_update_bits(component, WM8804_AIFTX, 0x3, format);
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snd_soc_component_update_bits(component, WM8804_AIFRX, 0x3, format);
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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master = 1;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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master = 0;
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break;
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default:
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dev_err(dai->dev, "Unknown master/slave configuration\n");
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return -EINVAL;
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}
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/* set master/slave mode */
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snd_soc_component_update_bits(component, WM8804_AIFRX, 0x40, master << 6);
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bcp = lrp = 0;
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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break;
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case SND_SOC_DAIFMT_IB_IF:
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bcp = lrp = 1;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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bcp = 1;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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lrp = 1;
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break;
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default:
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dev_err(dai->dev, "Unknown polarity configuration\n");
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return -EINVAL;
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}
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/* set frame inversion */
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snd_soc_component_update_bits(component, WM8804_AIFTX, 0x10 | 0x20,
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(bcp << 4) | (lrp << 5));
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snd_soc_component_update_bits(component, WM8804_AIFRX, 0x10 | 0x20,
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(bcp << 4) | (lrp << 5));
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return 0;
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}
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static int wm8804_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component;
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u16 blen;
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component = dai->component;
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switch (params_width(params)) {
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case 16:
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blen = 0x0;
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break;
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case 20:
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blen = 0x1;
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break;
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case 24:
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blen = 0x2;
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break;
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default:
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dev_err(dai->dev, "Unsupported word length: %u\n",
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params_width(params));
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return -EINVAL;
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}
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/* set word length */
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snd_soc_component_update_bits(component, WM8804_AIFTX, 0xc, blen << 2);
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snd_soc_component_update_bits(component, WM8804_AIFRX, 0xc, blen << 2);
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return 0;
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}
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struct pll_div {
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u32 prescale:1;
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u32 mclkdiv:1;
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u32 freqmode:2;
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u32 n:4;
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u32 k:22;
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};
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/* PLL rate to output rate divisions */
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static struct {
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unsigned int div;
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unsigned int freqmode;
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unsigned int mclkdiv;
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} post_table[] = {
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{ 2, 0, 0 },
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{ 4, 0, 1 },
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{ 4, 1, 0 },
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{ 8, 1, 1 },
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{ 8, 2, 0 },
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{ 16, 2, 1 },
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{ 12, 3, 0 },
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{ 24, 3, 1 }
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};
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#define FIXED_PLL_SIZE ((1ULL << 22) * 10)
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static int pll_factors(struct pll_div *pll_div, unsigned int target,
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unsigned int source, unsigned int mclk_div)
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{
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u64 Kpart;
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unsigned long int K, Ndiv, Nmod, tmp;
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int i;
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/*
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* Scale the output frequency up; the PLL should run in the
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* region of 90-100MHz.
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*/
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for (i = 0; i < ARRAY_SIZE(post_table); i++) {
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tmp = target * post_table[i].div;
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if ((tmp >= 90000000 && tmp <= 100000000) &&
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(mclk_div == post_table[i].mclkdiv)) {
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pll_div->freqmode = post_table[i].freqmode;
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pll_div->mclkdiv = post_table[i].mclkdiv;
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target *= post_table[i].div;
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break;
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}
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}
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if (i == ARRAY_SIZE(post_table)) {
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pr_err("%s: Unable to scale output frequency: %uHz\n",
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__func__, target);
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return -EINVAL;
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}
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pll_div->prescale = 0;
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Ndiv = target / source;
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if (Ndiv < 5) {
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source >>= 1;
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pll_div->prescale = 1;
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Ndiv = target / source;
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}
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if (Ndiv < 5 || Ndiv > 13) {
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pr_err("%s: WM8804 N value is not within the recommended range: %lu\n",
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__func__, Ndiv);
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return -EINVAL;
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}
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pll_div->n = Ndiv;
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Nmod = target % source;
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Kpart = FIXED_PLL_SIZE * (u64)Nmod;
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do_div(Kpart, source);
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K = Kpart & 0xffffffff;
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if ((K % 10) >= 5)
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K += 5;
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K /= 10;
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pll_div->k = K;
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return 0;
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}
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static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id,
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int source, unsigned int freq_in,
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unsigned int freq_out)
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{
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struct snd_soc_component *component = dai->component;
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struct wm8804_priv *wm8804 = snd_soc_component_get_drvdata(component);
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bool change;
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if (!freq_in || !freq_out) {
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/* disable the PLL */
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regmap_update_bits_check(wm8804->regmap, WM8804_PWRDN,
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0x1, 0x1, &change);
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if (change)
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pm_runtime_put(wm8804->dev);
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} else {
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int ret;
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struct pll_div pll_div;
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ret = pll_factors(&pll_div, freq_out, freq_in,
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wm8804->mclk_div);
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if (ret)
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return ret;
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/* power down the PLL before reprogramming it */
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regmap_update_bits_check(wm8804->regmap, WM8804_PWRDN,
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0x1, 0x1, &change);
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if (!change)
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pm_runtime_get_sync(wm8804->dev);
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/* set PLLN and PRESCALE */
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snd_soc_component_update_bits(component, WM8804_PLL4, 0xf | 0x10,
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pll_div.n | (pll_div.prescale << 4));
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/* set mclkdiv and freqmode */
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snd_soc_component_update_bits(component, WM8804_PLL5, 0x3 | 0x8,
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pll_div.freqmode | (pll_div.mclkdiv << 3));
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/* set PLLK */
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snd_soc_component_write(component, WM8804_PLL1, pll_div.k & 0xff);
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snd_soc_component_write(component, WM8804_PLL2, (pll_div.k >> 8) & 0xff);
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snd_soc_component_write(component, WM8804_PLL3, pll_div.k >> 16);
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/* power up the PLL */
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snd_soc_component_update_bits(component, WM8804_PWRDN, 0x1, 0);
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}
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return 0;
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}
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static int wm8804_set_sysclk(struct snd_soc_dai *dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_component *component;
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component = dai->component;
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switch (clk_id) {
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case WM8804_TX_CLKSRC_MCLK:
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if ((freq >= 10000000 && freq <= 14400000)
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|| (freq >= 16280000 && freq <= 27000000))
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snd_soc_component_update_bits(component, WM8804_PLL6, 0x80, 0x80);
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else {
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dev_err(dai->dev, "OSCCLOCK is not within the "
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"recommended range: %uHz\n", freq);
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return -EINVAL;
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}
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break;
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case WM8804_TX_CLKSRC_PLL:
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snd_soc_component_update_bits(component, WM8804_PLL6, 0x80, 0);
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break;
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case WM8804_CLKOUT_SRC_CLK1:
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snd_soc_component_update_bits(component, WM8804_PLL6, 0x8, 0);
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break;
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case WM8804_CLKOUT_SRC_OSCCLK:
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snd_soc_component_update_bits(component, WM8804_PLL6, 0x8, 0x8);
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break;
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default:
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dev_err(dai->dev, "Unknown clock source: %d\n", clk_id);
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return -EINVAL;
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|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int wm8804_set_clkdiv(struct snd_soc_dai *dai,
|
|
int div_id, int div)
|
|
{
|
|
struct snd_soc_component *component;
|
|
struct wm8804_priv *wm8804;
|
|
|
|
component = dai->component;
|
|
switch (div_id) {
|
|
case WM8804_CLKOUT_DIV:
|
|
snd_soc_component_update_bits(component, WM8804_PLL5, 0x30,
|
|
(div & 0x3) << 4);
|
|
break;
|
|
case WM8804_MCLK_DIV:
|
|
wm8804 = snd_soc_component_get_drvdata(component);
|
|
wm8804->mclk_div = div;
|
|
break;
|
|
default:
|
|
dev_err(dai->dev, "Unknown clock divider: %d\n", div_id);
|
|
return -EINVAL;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static const struct snd_soc_dai_ops wm8804_dai_ops = {
|
|
.hw_params = wm8804_hw_params,
|
|
.set_fmt = wm8804_set_fmt,
|
|
.set_sysclk = wm8804_set_sysclk,
|
|
.set_clkdiv = wm8804_set_clkdiv,
|
|
.set_pll = wm8804_set_pll
|
|
};
|
|
|
|
#define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
|
|
SNDRV_PCM_FMTBIT_S24_LE)
|
|
|
|
#define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
|
|
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
|
|
SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
|
|
SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
|
|
|
|
static struct snd_soc_dai_driver wm8804_dai = {
|
|
.name = "wm8804-spdif",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 2,
|
|
.channels_max = 2,
|
|
.rates = WM8804_RATES,
|
|
.formats = WM8804_FORMATS,
|
|
},
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 2,
|
|
.channels_max = 2,
|
|
.rates = WM8804_RATES,
|
|
.formats = WM8804_FORMATS,
|
|
},
|
|
.ops = &wm8804_dai_ops,
|
|
.symmetric_rate = 1
|
|
};
|
|
|
|
static const struct snd_soc_component_driver soc_component_dev_wm8804 = {
|
|
.dapm_widgets = wm8804_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(wm8804_dapm_widgets),
|
|
.dapm_routes = wm8804_dapm_routes,
|
|
.num_dapm_routes = ARRAY_SIZE(wm8804_dapm_routes),
|
|
.use_pmdown_time = 1,
|
|
.endianness = 1,
|
|
.non_legacy_dai_naming = 1,
|
|
};
|
|
|
|
const struct regmap_config wm8804_regmap_config = {
|
|
.reg_bits = 8,
|
|
.val_bits = 8,
|
|
|
|
.max_register = WM8804_MAX_REGISTER,
|
|
.volatile_reg = wm8804_volatile,
|
|
|
|
.cache_type = REGCACHE_RBTREE,
|
|
.reg_defaults = wm8804_reg_defaults,
|
|
.num_reg_defaults = ARRAY_SIZE(wm8804_reg_defaults),
|
|
};
|
|
EXPORT_SYMBOL_GPL(wm8804_regmap_config);
|
|
|
|
int wm8804_probe(struct device *dev, struct regmap *regmap)
|
|
{
|
|
struct wm8804_priv *wm8804;
|
|
unsigned int id1, id2;
|
|
int i, ret;
|
|
|
|
wm8804 = devm_kzalloc(dev, sizeof(*wm8804), GFP_KERNEL);
|
|
if (!wm8804)
|
|
return -ENOMEM;
|
|
|
|
dev_set_drvdata(dev, wm8804);
|
|
|
|
wm8804->dev = dev;
|
|
wm8804->regmap = regmap;
|
|
|
|
wm8804->reset = devm_gpiod_get_optional(dev, "wlf,reset",
|
|
GPIOD_OUT_LOW);
|
|
if (IS_ERR(wm8804->reset)) {
|
|
ret = PTR_ERR(wm8804->reset);
|
|
dev_err(dev, "Failed to get reset line: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++)
|
|
wm8804->supplies[i].supply = wm8804_supply_names[i];
|
|
|
|
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(wm8804->supplies),
|
|
wm8804->supplies);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to request supplies: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
wm8804->disable_nb[0].notifier_call = wm8804_regulator_event_0;
|
|
wm8804->disable_nb[1].notifier_call = wm8804_regulator_event_1;
|
|
|
|
/* This should really be moved into the regulator core */
|
|
for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++) {
|
|
struct regulator *regulator = wm8804->supplies[i].consumer;
|
|
|
|
ret = devm_regulator_register_notifier(regulator,
|
|
&wm8804->disable_nb[i]);
|
|
if (ret != 0) {
|
|
dev_err(dev,
|
|
"Failed to register regulator notifier: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
|
|
wm8804->supplies);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to enable supplies: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
gpiod_set_value_cansleep(wm8804->reset, 1);
|
|
|
|
ret = regmap_read(regmap, WM8804_RST_DEVID1, &id1);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to read device ID: %d\n", ret);
|
|
goto err_reg_enable;
|
|
}
|
|
|
|
ret = regmap_read(regmap, WM8804_DEVID2, &id2);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to read device ID: %d\n", ret);
|
|
goto err_reg_enable;
|
|
}
|
|
|
|
id2 = (id2 << 8) | id1;
|
|
|
|
if (id2 != 0x8805) {
|
|
dev_err(dev, "Invalid device ID: %#x\n", id2);
|
|
ret = -EINVAL;
|
|
goto err_reg_enable;
|
|
}
|
|
|
|
ret = regmap_read(regmap, WM8804_DEVREV, &id1);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to read device revision: %d\n",
|
|
ret);
|
|
goto err_reg_enable;
|
|
}
|
|
dev_info(dev, "revision %c\n", id1 + 'A');
|
|
|
|
if (!wm8804->reset) {
|
|
ret = wm8804_soft_reset(wm8804);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to issue reset: %d\n", ret);
|
|
goto err_reg_enable;
|
|
}
|
|
}
|
|
|
|
ret = devm_snd_soc_register_component(dev, &soc_component_dev_wm8804,
|
|
&wm8804_dai, 1);
|
|
if (ret < 0) {
|
|
dev_err(dev, "Failed to register CODEC: %d\n", ret);
|
|
goto err_reg_enable;
|
|
}
|
|
|
|
pm_runtime_set_active(dev);
|
|
pm_runtime_enable(dev);
|
|
pm_runtime_idle(dev);
|
|
|
|
return 0;
|
|
|
|
err_reg_enable:
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), wm8804->supplies);
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(wm8804_probe);
|
|
|
|
void wm8804_remove(struct device *dev)
|
|
{
|
|
pm_runtime_disable(dev);
|
|
}
|
|
EXPORT_SYMBOL_GPL(wm8804_remove);
|
|
|
|
#if IS_ENABLED(CONFIG_PM)
|
|
static int wm8804_runtime_resume(struct device *dev)
|
|
{
|
|
struct wm8804_priv *wm8804 = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies),
|
|
wm8804->supplies);
|
|
if (ret) {
|
|
dev_err(wm8804->dev, "Failed to enable supplies: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
regcache_sync(wm8804->regmap);
|
|
|
|
/* Power up OSCCLK */
|
|
regmap_update_bits(wm8804->regmap, WM8804_PWRDN, 0x8, 0x0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int wm8804_runtime_suspend(struct device *dev)
|
|
{
|
|
struct wm8804_priv *wm8804 = dev_get_drvdata(dev);
|
|
|
|
/* Power down OSCCLK */
|
|
regmap_update_bits(wm8804->regmap, WM8804_PWRDN, 0x8, 0x8);
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies),
|
|
wm8804->supplies);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
const struct dev_pm_ops wm8804_pm = {
|
|
SET_RUNTIME_PM_OPS(wm8804_runtime_suspend, wm8804_runtime_resume, NULL)
|
|
};
|
|
EXPORT_SYMBOL_GPL(wm8804_pm);
|
|
|
|
MODULE_DESCRIPTION("ASoC WM8804 driver");
|
|
MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>");
|
|
MODULE_LICENSE("GPL");
|