370 lines
10 KiB
C
370 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for BCM6358 GPIO unit (pinctrl + GPIO)
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*
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* Copyright (C) 2021 Álvaro Fernández Rojas <noltari@gmail.com>
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* Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
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*/
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#include <linux/bits.h>
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#include <linux/gpio/driver.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include "../pinctrl-utils.h"
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#include "pinctrl-bcm63xx.h"
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#define BCM6358_NUM_GPIOS 40
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#define BCM6358_MODE_REG 0x18
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#define BCM6358_MODE_MUX_NONE 0
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#define BCM6358_MODE_MUX_EBI_CS BIT(5)
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#define BCM6358_MODE_MUX_UART1 BIT(6)
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#define BCM6358_MODE_MUX_SPI_CS BIT(7)
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#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
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#define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
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#define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
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#define BCM6358_MODE_MUX_LED BIT(11)
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#define BCM6358_MODE_MUX_UTOPIA BIT(12)
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#define BCM6358_MODE_MUX_CLKRST BIT(13)
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#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
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#define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
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struct bcm6358_pingroup {
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const char *name;
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const unsigned * const pins;
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const unsigned num_pins;
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const uint16_t mode_val;
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/* non-GPIO function muxes require the gpio direction to be set */
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const uint16_t direction;
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};
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struct bcm6358_function {
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const char *name;
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const char * const *groups;
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const unsigned num_groups;
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};
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struct bcm6358_priv {
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struct regmap_field *overlays;
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};
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#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
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{ \
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.number = a, \
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.name = b, \
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.drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
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BCM6358_MODE_MUX_##bit2 | \
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BCM6358_MODE_MUX_##bit3), \
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}
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static const struct pinctrl_pin_desc bcm6358_pins[] = {
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BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
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BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
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BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
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BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
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PINCTRL_PIN(4, "gpio4"),
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BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
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BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
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BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
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BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
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BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
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BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
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BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
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BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
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BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
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BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
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BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
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PINCTRL_PIN(16, "gpio16"),
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PINCTRL_PIN(17, "gpio17"),
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PINCTRL_PIN(18, "gpio18"),
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PINCTRL_PIN(19, "gpio19"),
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PINCTRL_PIN(20, "gpio20"),
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PINCTRL_PIN(21, "gpio21"),
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BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
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BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
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BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
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BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
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BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
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BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
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BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
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BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
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BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
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BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
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BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
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BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
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PINCTRL_PIN(34, "gpio34"),
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PINCTRL_PIN(35, "gpio35"),
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PINCTRL_PIN(36, "gpio36"),
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PINCTRL_PIN(37, "gpio37"),
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PINCTRL_PIN(38, "gpio38"),
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PINCTRL_PIN(39, "gpio39"),
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};
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static unsigned ebi_cs_grp_pins[] = { 30, 31 };
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static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
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static unsigned spi_cs_grp_pins[] = { 32, 33 };
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static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
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static unsigned serial_led_grp_pins[] = { 6, 7 };
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static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
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static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
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static unsigned utopia_grp_pins[] = {
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12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
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};
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static unsigned pwm_syn_clk_grp_pins[] = { 8 };
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static unsigned sys_irq_grp_pins[] = { 5 };
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#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
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{ \
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.name = #n, \
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.pins = n##_pins, \
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.num_pins = ARRAY_SIZE(n##_pins), \
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.mode_val = BCM6358_MODE_MUX_##bit, \
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.direction = dir, \
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}
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static const struct bcm6358_pingroup bcm6358_groups[] = {
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BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
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BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
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BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
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BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
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BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
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BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
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BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
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BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
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BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
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BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
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};
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static const char * const ebi_cs_groups[] = {
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"ebi_cs_grp"
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};
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static const char * const uart1_groups[] = {
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"uart1_grp"
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};
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static const char * const spi_cs_2_3_groups[] = {
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"spi_cs_2_3_grp"
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};
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static const char * const async_modem_groups[] = {
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"async_modem_grp"
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};
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static const char * const legacy_led_groups[] = {
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"legacy_led_grp",
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};
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static const char * const serial_led_groups[] = {
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"serial_led_grp",
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};
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static const char * const led_groups[] = {
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"led_grp",
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};
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static const char * const clkrst_groups[] = {
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"clkrst_grp",
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};
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static const char * const pwm_syn_clk_groups[] = {
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"pwm_syn_clk_grp",
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};
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static const char * const sys_irq_groups[] = {
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"sys_irq_grp",
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};
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#define BCM6358_FUN(n) \
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{ \
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.name = #n, \
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.groups = n##_groups, \
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.num_groups = ARRAY_SIZE(n##_groups), \
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}
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static const struct bcm6358_function bcm6358_funcs[] = {
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BCM6358_FUN(ebi_cs),
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BCM6358_FUN(uart1),
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BCM6358_FUN(spi_cs_2_3),
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BCM6358_FUN(async_modem),
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BCM6358_FUN(legacy_led),
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BCM6358_FUN(serial_led),
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BCM6358_FUN(led),
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BCM6358_FUN(clkrst),
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BCM6358_FUN(pwm_syn_clk),
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BCM6358_FUN(sys_irq),
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};
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static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(bcm6358_groups);
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}
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static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned group)
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{
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return bcm6358_groups[group].name;
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}
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static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned group, const unsigned **pins,
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unsigned *num_pins)
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{
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*pins = bcm6358_groups[group].pins;
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*num_pins = bcm6358_groups[group].num_pins;
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return 0;
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}
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static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(bcm6358_funcs);
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}
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static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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return bcm6358_funcs[selector].name;
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}
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static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
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unsigned selector,
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const char * const **groups,
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unsigned * const num_groups)
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{
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*groups = bcm6358_funcs[selector].groups;
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*num_groups = bcm6358_funcs[selector].num_groups;
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return 0;
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}
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static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
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unsigned selector, unsigned group)
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{
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struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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struct bcm6358_priv *priv = pc->driver_data;
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const struct bcm6358_pingroup *pg = &bcm6358_groups[group];
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unsigned int val = pg->mode_val;
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unsigned int mask = val;
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unsigned pin;
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for (pin = 0; pin < pg->num_pins; pin++)
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mask |= (unsigned long)bcm6358_pins[pin].drv_data;
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regmap_field_update_bits(priv->overlays, mask, val);
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for (pin = 0; pin < pg->num_pins; pin++) {
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struct pinctrl_gpio_range *range;
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unsigned int hw_gpio = bcm6358_pins[pin].number;
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range = pinctrl_find_gpio_range_from_pin(pctldev, hw_gpio);
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if (range) {
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struct gpio_chip *gc = range->gc;
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if (pg->direction & BIT(pin))
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gc->direction_output(gc, hw_gpio, 0);
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else
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gc->direction_input(gc, hw_gpio);
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}
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}
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return 0;
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}
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static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned offset)
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{
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struct bcm63xx_pinctrl *pc = pinctrl_dev_get_drvdata(pctldev);
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struct bcm6358_priv *priv = pc->driver_data;
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unsigned int mask;
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mask = (unsigned long) bcm6358_pins[offset].drv_data;
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if (!mask)
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return 0;
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/* disable all functions using this pin */
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return regmap_field_update_bits(priv->overlays, mask, 0);
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}
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static const struct pinctrl_ops bcm6358_pctl_ops = {
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.dt_free_map = pinctrl_utils_free_map,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
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.get_group_name = bcm6358_pinctrl_get_group_name,
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.get_group_pins = bcm6358_pinctrl_get_group_pins,
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.get_groups_count = bcm6358_pinctrl_get_group_count,
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};
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static const struct pinmux_ops bcm6358_pmx_ops = {
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.get_function_groups = bcm6358_pinctrl_get_groups,
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.get_function_name = bcm6358_pinctrl_get_func_name,
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.get_functions_count = bcm6358_pinctrl_get_func_count,
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.gpio_request_enable = bcm6358_gpio_request_enable,
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.set_mux = bcm6358_pinctrl_set_mux,
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.strict = true,
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};
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static const struct bcm63xx_pinctrl_soc bcm6358_soc = {
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.ngpios = BCM6358_NUM_GPIOS,
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.npins = ARRAY_SIZE(bcm6358_pins),
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.pctl_ops = &bcm6358_pctl_ops,
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.pins = bcm6358_pins,
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.pmx_ops = &bcm6358_pmx_ops,
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};
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static int bcm6358_pinctrl_probe(struct platform_device *pdev)
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{
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struct reg_field overlays = REG_FIELD(BCM6358_MODE_REG, 0, 15);
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struct device *dev = &pdev->dev;
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struct bcm63xx_pinctrl *pc;
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struct bcm6358_priv *priv;
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int err;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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err = bcm63xx_pinctrl_probe(pdev, &bcm6358_soc, (void *) priv);
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if (err)
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return err;
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pc = platform_get_drvdata(pdev);
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priv->overlays = devm_regmap_field_alloc(dev, pc->regs, overlays);
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if (IS_ERR(priv->overlays))
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return PTR_ERR(priv->overlays);
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return 0;
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}
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static const struct of_device_id bcm6358_pinctrl_match[] = {
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{ .compatible = "brcm,bcm6358-pinctrl", },
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{ /* sentinel */ }
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};
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static struct platform_driver bcm6358_pinctrl_driver = {
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.probe = bcm6358_pinctrl_probe,
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.driver = {
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.name = "bcm6358-pinctrl",
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.of_match_table = bcm6358_pinctrl_match,
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},
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};
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builtin_platform_driver(bcm6358_pinctrl_driver);
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