103 lines
3.2 KiB
C
103 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (C) 2018-2021 Intel Corporation
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*/
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#ifndef __iwl_io_h__
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#define __iwl_io_h__
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#include "iwl-devtrace.h"
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#include "iwl-trans.h"
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void iwl_write8(struct iwl_trans *trans, u32 ofs, u8 val);
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void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val);
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void iwl_write64(struct iwl_trans *trans, u64 ofs, u64 val);
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u32 iwl_read32(struct iwl_trans *trans, u32 ofs);
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static inline void iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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{
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iwl_trans_set_bits_mask(trans, reg, mask, mask);
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}
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static inline void iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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{
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iwl_trans_set_bits_mask(trans, reg, mask, 0);
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}
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int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout);
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int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
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int timeout);
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u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg);
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void iwl_write_direct32(struct iwl_trans *trans, u32 reg, u32 value);
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void iwl_write_direct64(struct iwl_trans *trans, u64 reg, u64 value);
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u32 iwl_read_prph_no_grab(struct iwl_trans *trans, u32 ofs);
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u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs);
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void iwl_write_prph_no_grab(struct iwl_trans *trans, u32 ofs, u32 val);
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void iwl_write_prph64_no_grab(struct iwl_trans *trans, u64 ofs, u64 val);
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void iwl_write_prph_delay(struct iwl_trans *trans, u32 ofs,
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u32 val, u32 delay_ms);
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static inline void iwl_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
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{
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iwl_write_prph_delay(trans, ofs, val, 0);
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}
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int iwl_poll_prph_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout);
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void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
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void iwl_set_bits_mask_prph(struct iwl_trans *trans, u32 ofs,
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u32 bits, u32 mask);
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void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
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void iwl_force_nmi(struct iwl_trans *trans);
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int iwl_finish_nic_init(struct iwl_trans *trans);
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/* Error handling */
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int iwl_dump_fh(struct iwl_trans *trans, char **buf);
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/*
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* UMAC periphery address space changed from 0xA00000 to 0xD00000 starting from
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* device family AX200. So peripheries used in families above and below AX200
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* should go through iwl_..._umac_..._prph.
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*/
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static inline u32 iwl_umac_prph(struct iwl_trans *trans, u32 ofs)
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{
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return ofs + trans->trans_cfg->umac_prph_offset;
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}
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static inline u32 iwl_read_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs)
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{
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return iwl_read_prph_no_grab(trans, ofs +
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trans->trans_cfg->umac_prph_offset);
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}
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static inline u32 iwl_read_umac_prph(struct iwl_trans *trans, u32 ofs)
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{
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return iwl_read_prph(trans, ofs + trans->trans_cfg->umac_prph_offset);
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}
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static inline void iwl_write_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs,
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u32 val)
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{
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iwl_write_prph_no_grab(trans, ofs + trans->trans_cfg->umac_prph_offset,
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val);
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}
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static inline void iwl_write_umac_prph(struct iwl_trans *trans, u32 ofs,
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u32 val)
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{
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iwl_write_prph(trans, ofs + trans->trans_cfg->umac_prph_offset, val);
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}
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static inline int iwl_poll_umac_prph_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout)
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{
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return iwl_poll_prph_bit(trans, addr +
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trans->trans_cfg->umac_prph_offset,
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bits, mask, timeout);
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}
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#endif
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