157 lines
5.0 KiB
C
157 lines
5.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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*/
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/* Qualcomm Technologies, Inc. EMAC PHY Controller driver.
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*/
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#include <linux/of_mdio.h>
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#include <linux/phy.h>
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#include <linux/iopoll.h>
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#include <linux/acpi.h>
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#include "emac.h"
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/* EMAC base register offsets */
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#define EMAC_MDIO_CTRL 0x001414
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#define EMAC_PHY_STS 0x001418
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#define EMAC_MDIO_EX_CTRL 0x001440
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/* EMAC_MDIO_CTRL */
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#define MDIO_MODE BIT(30)
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#define MDIO_PR BIT(29)
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#define MDIO_AP_EN BIT(28)
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#define MDIO_BUSY BIT(27)
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#define MDIO_CLK_SEL_BMSK 0x7000000
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#define MDIO_CLK_SEL_SHFT 24
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#define MDIO_START BIT(23)
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#define SUP_PREAMBLE BIT(22)
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#define MDIO_RD_NWR BIT(21)
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#define MDIO_REG_ADDR_BMSK 0x1f0000
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#define MDIO_REG_ADDR_SHFT 16
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#define MDIO_DATA_BMSK 0xffff
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#define MDIO_DATA_SHFT 0
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/* EMAC_PHY_STS */
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#define PHY_ADDR_BMSK 0x1f0000
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#define PHY_ADDR_SHFT 16
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#define MDIO_CLK_25_4 0
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#define MDIO_CLK_25_28 7
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#define MDIO_WAIT_TIMES 1000
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#define MDIO_STATUS_DELAY_TIME 1
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static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum)
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{
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struct emac_adapter *adpt = bus->priv;
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u32 reg;
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emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
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(addr << PHY_ADDR_SHFT));
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reg = SUP_PREAMBLE |
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((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
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((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
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MDIO_START | MDIO_RD_NWR;
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writel(reg, adpt->base + EMAC_MDIO_CTRL);
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if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
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!(reg & (MDIO_START | MDIO_BUSY)),
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MDIO_STATUS_DELAY_TIME, MDIO_WAIT_TIMES * 100))
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return -EIO;
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return (reg >> MDIO_DATA_SHFT) & MDIO_DATA_BMSK;
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}
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static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
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{
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struct emac_adapter *adpt = bus->priv;
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u32 reg;
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emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
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(addr << PHY_ADDR_SHFT));
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reg = SUP_PREAMBLE |
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((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
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((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
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((val << MDIO_DATA_SHFT) & MDIO_DATA_BMSK) |
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MDIO_START;
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writel(reg, adpt->base + EMAC_MDIO_CTRL);
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if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
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!(reg & (MDIO_START | MDIO_BUSY)),
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MDIO_STATUS_DELAY_TIME, MDIO_WAIT_TIMES * 100))
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return -EIO;
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return 0;
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}
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/* Configure the MDIO bus and connect the external PHY */
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int emac_phy_config(struct platform_device *pdev, struct emac_adapter *adpt)
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{
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struct device_node *np = pdev->dev.of_node;
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struct mii_bus *mii_bus;
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int ret;
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/* Create the mii_bus object for talking to the MDIO bus */
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adpt->mii_bus = mii_bus = devm_mdiobus_alloc(&pdev->dev);
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if (!mii_bus)
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return -ENOMEM;
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mii_bus->name = "emac-mdio";
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snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
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mii_bus->read = emac_mdio_read;
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mii_bus->write = emac_mdio_write;
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mii_bus->parent = &pdev->dev;
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mii_bus->priv = adpt;
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if (has_acpi_companion(&pdev->dev)) {
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u32 phy_addr;
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ret = mdiobus_register(mii_bus);
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if (ret) {
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dev_err(&pdev->dev, "could not register mdio bus\n");
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return ret;
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}
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ret = device_property_read_u32(&pdev->dev, "phy-channel",
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&phy_addr);
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if (ret)
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/* If we can't read a valid phy address, then assume
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* that there is only one phy on this mdio bus.
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*/
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adpt->phydev = phy_find_first(mii_bus);
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else
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adpt->phydev = mdiobus_get_phy(mii_bus, phy_addr);
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/* of_phy_find_device() claims a reference to the phydev,
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* so we do that here manually as well. When the driver
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* later unloads, it can unilaterally drop the reference
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* without worrying about ACPI vs DT.
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*/
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if (adpt->phydev)
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get_device(&adpt->phydev->mdio.dev);
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} else {
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struct device_node *phy_np;
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ret = of_mdiobus_register(mii_bus, np);
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if (ret) {
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dev_err(&pdev->dev, "could not register mdio bus\n");
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return ret;
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}
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phy_np = of_parse_phandle(np, "phy-handle", 0);
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adpt->phydev = of_phy_find_device(phy_np);
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of_node_put(phy_np);
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}
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if (!adpt->phydev) {
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dev_err(&pdev->dev, "could not find external phy\n");
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mdiobus_unregister(mii_bus);
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return -ENODEV;
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}
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return 0;
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}
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