611 lines
16 KiB
C
611 lines
16 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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/* QLogic qede NIC Driver
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* Copyright (c) 2015-2017 QLogic Corporation
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* Copyright (c) 2019-2020 Marvell International Ltd.
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*/
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#ifndef _QEDE_H_
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#define _QEDE_H_
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#include <linux/compiler.h>
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#include <linux/version.h>
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#include <linux/workqueue.h>
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#include <linux/netdevice.h>
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#include <linux/interrupt.h>
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#include <linux/bitmap.h>
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#include <linux/kernel.h>
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#include <linux/mutex.h>
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#include <linux/bpf.h>
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#include <net/xdp.h>
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#include <linux/qed/qede_rdma.h>
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#include <linux/io.h>
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#ifdef CONFIG_RFS_ACCEL
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#include <linux/cpu_rmap.h>
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#endif
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#include <linux/qed/common_hsi.h>
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#include <linux/qed/eth_common.h>
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#include <linux/qed/qed_if.h>
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#include <linux/qed/qed_chain.h>
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#include <linux/qed/qed_eth_if.h>
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#include <net/pkt_cls.h>
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#include <net/tc_act/tc_gact.h>
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#define DRV_MODULE_SYM qede
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struct qede_stats_common {
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u64 no_buff_discards;
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u64 packet_too_big_discard;
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u64 ttl0_discard;
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u64 rx_ucast_bytes;
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u64 rx_mcast_bytes;
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u64 rx_bcast_bytes;
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u64 rx_ucast_pkts;
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u64 rx_mcast_pkts;
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u64 rx_bcast_pkts;
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u64 mftag_filter_discards;
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u64 mac_filter_discards;
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u64 gft_filter_drop;
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u64 tx_ucast_bytes;
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u64 tx_mcast_bytes;
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u64 tx_bcast_bytes;
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u64 tx_ucast_pkts;
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u64 tx_mcast_pkts;
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u64 tx_bcast_pkts;
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u64 tx_err_drop_pkts;
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u64 coalesced_pkts;
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u64 coalesced_events;
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u64 coalesced_aborts_num;
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u64 non_coalesced_pkts;
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u64 coalesced_bytes;
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u64 link_change_count;
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u64 ptp_skip_txts;
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/* port */
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u64 rx_64_byte_packets;
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u64 rx_65_to_127_byte_packets;
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u64 rx_128_to_255_byte_packets;
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u64 rx_256_to_511_byte_packets;
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u64 rx_512_to_1023_byte_packets;
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u64 rx_1024_to_1518_byte_packets;
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u64 rx_crc_errors;
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u64 rx_mac_crtl_frames;
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u64 rx_pause_frames;
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u64 rx_pfc_frames;
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u64 rx_align_errors;
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u64 rx_carrier_errors;
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u64 rx_oversize_packets;
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u64 rx_jabbers;
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u64 rx_undersize_packets;
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u64 rx_fragments;
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u64 tx_64_byte_packets;
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u64 tx_65_to_127_byte_packets;
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u64 tx_128_to_255_byte_packets;
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u64 tx_256_to_511_byte_packets;
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u64 tx_512_to_1023_byte_packets;
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u64 tx_1024_to_1518_byte_packets;
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u64 tx_pause_frames;
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u64 tx_pfc_frames;
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u64 brb_truncates;
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u64 brb_discards;
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u64 tx_mac_ctrl_frames;
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};
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struct qede_stats_bb {
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u64 rx_1519_to_1522_byte_packets;
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u64 rx_1519_to_2047_byte_packets;
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u64 rx_2048_to_4095_byte_packets;
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u64 rx_4096_to_9216_byte_packets;
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u64 rx_9217_to_16383_byte_packets;
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u64 tx_1519_to_2047_byte_packets;
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u64 tx_2048_to_4095_byte_packets;
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u64 tx_4096_to_9216_byte_packets;
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u64 tx_9217_to_16383_byte_packets;
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u64 tx_lpi_entry_count;
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u64 tx_total_collisions;
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};
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struct qede_stats_ah {
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u64 rx_1519_to_max_byte_packets;
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u64 tx_1519_to_max_byte_packets;
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};
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struct qede_stats {
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struct qede_stats_common common;
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union {
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struct qede_stats_bb bb;
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struct qede_stats_ah ah;
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};
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};
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struct qede_vlan {
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struct list_head list;
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u16 vid;
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bool configured;
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};
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struct qede_rdma_dev {
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struct qedr_dev *qedr_dev;
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struct list_head entry;
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struct list_head rdma_event_list;
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struct workqueue_struct *rdma_wq;
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struct kref refcnt;
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struct completion event_comp;
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bool exp_recovery;
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};
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struct qede_ptp;
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#define QEDE_RFS_MAX_FLTR 256
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enum qede_flags_bit {
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QEDE_FLAGS_IS_VF = 0,
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QEDE_FLAGS_LINK_REQUESTED,
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QEDE_FLAGS_PTP_TX_IN_PRORGESS,
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QEDE_FLAGS_TX_TIMESTAMPING_EN
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};
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#define QEDE_DUMP_MAX_ARGS 4
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enum qede_dump_cmd {
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QEDE_DUMP_CMD_NONE = 0,
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QEDE_DUMP_CMD_NVM_CFG,
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QEDE_DUMP_CMD_GRCDUMP,
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QEDE_DUMP_CMD_MAX
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};
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struct qede_dump_info {
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enum qede_dump_cmd cmd;
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u8 num_args;
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u32 args[QEDE_DUMP_MAX_ARGS];
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};
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struct qede_coalesce {
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bool isvalid;
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u16 rxc;
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u16 txc;
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};
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struct qede_dev {
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struct qed_dev *cdev;
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struct net_device *ndev;
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struct pci_dev *pdev;
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struct devlink *devlink;
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u32 dp_module;
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u8 dp_level;
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unsigned long flags;
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#define IS_VF(edev) test_bit(QEDE_FLAGS_IS_VF, \
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&(edev)->flags)
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const struct qed_eth_ops *ops;
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struct qede_ptp *ptp;
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u64 ptp_skip_txts;
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struct qed_dev_eth_info dev_info;
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#define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
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#define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues)
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#define QEDE_IS_BB(edev) \
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((edev)->dev_info.common.dev_type == QED_DEV_TYPE_BB)
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#define QEDE_IS_AH(edev) \
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((edev)->dev_info.common.dev_type == QED_DEV_TYPE_AH)
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struct qede_fastpath *fp_array;
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struct qede_coalesce *coal_entry;
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u8 req_num_tx;
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u8 fp_num_tx;
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u8 req_num_rx;
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u8 fp_num_rx;
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u16 req_queues;
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u16 num_queues;
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u16 total_xdp_queues;
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#define QEDE_QUEUE_CNT(edev) ((edev)->num_queues)
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#define QEDE_RSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_tx)
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#define QEDE_RX_QUEUE_IDX(edev, i) (i)
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#define QEDE_TSS_COUNT(edev) ((edev)->num_queues - (edev)->fp_num_rx)
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struct qed_int_info int_info;
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/* Smaller private variant of the RTNL lock */
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struct mutex qede_lock;
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u32 state; /* Protected by qede_lock */
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u16 rx_buf_size;
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u32 rx_copybreak;
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/* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
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#define ETH_OVERHEAD (ETH_HLEN + 8 + 8)
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/* Max supported alignment is 256 (8 shift)
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* minimal alignment shift 6 is optimal for 57xxx HW performance
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*/
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#define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
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/* We assume skb_build() uses sizeof(struct skb_shared_info) bytes
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* at the end of skb->data, to avoid wasting a full cache line.
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* This reduces memory use (skb->truesize).
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*/
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#define QEDE_FW_RX_ALIGN_END \
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max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT, \
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SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
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struct qede_stats stats;
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/* Bitfield to track initialized RSS params */
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u32 rss_params_inited;
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#define QEDE_RSS_INDIR_INITED BIT(0)
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#define QEDE_RSS_KEY_INITED BIT(1)
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#define QEDE_RSS_CAPS_INITED BIT(2)
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u16 rss_ind_table[128];
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u32 rss_key[10];
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u8 rss_caps;
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/* Both must be a power of two */
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u16 q_num_rx_buffers;
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u16 q_num_tx_buffers;
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bool gro_disable;
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struct list_head vlan_list;
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u16 configured_vlans;
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u16 non_configured_vlans;
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bool accept_any_vlan;
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struct delayed_work sp_task;
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unsigned long sp_flags;
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u16 vxlan_dst_port;
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u16 geneve_dst_port;
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struct qede_arfs *arfs;
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bool wol_enabled;
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struct qede_rdma_dev rdma_info;
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struct bpf_prog *xdp_prog;
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enum qed_hw_err_type last_err_type;
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unsigned long err_flags;
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#define QEDE_ERR_IS_HANDLED 31
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#define QEDE_ERR_ATTN_CLR_EN 0
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#define QEDE_ERR_GET_DBG_INFO 1
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#define QEDE_ERR_IS_RECOVERABLE 2
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#define QEDE_ERR_WARN 3
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struct qede_dump_info dump_info;
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};
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enum QEDE_STATE {
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QEDE_STATE_CLOSED,
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QEDE_STATE_OPEN,
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QEDE_STATE_RECOVERY,
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};
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#define HILO_U64(hi, lo) ((((u64)(hi)) << 32) + (lo))
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#define MAX_NUM_TC 8
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#define MAX_NUM_PRI 8
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/* The driver supports the new build_skb() API:
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* RX ring buffer contains pointer to kmalloc() data only,
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* skb are built only after the frame was DMA-ed.
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*/
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struct sw_rx_data {
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struct page *data;
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dma_addr_t mapping;
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unsigned int page_offset;
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};
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enum qede_agg_state {
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QEDE_AGG_STATE_NONE = 0,
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QEDE_AGG_STATE_START = 1,
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QEDE_AGG_STATE_ERROR = 2
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};
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struct qede_agg_info {
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/* rx_buf is a data buffer that can be placed / consumed from rx bd
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* chain. It has two purposes: We will preallocate the data buffer
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* for each aggregation when we open the interface and will place this
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* buffer on the rx-bd-ring when we receive TPA_START. We don't want
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* to be in a state where allocation fails, as we can't reuse the
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* consumer buffer in the rx-chain since FW may still be writing to it
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* (since header needs to be modified for TPA).
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* The second purpose is to keep a pointer to the bd buffer during
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* aggregation.
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*/
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struct sw_rx_data buffer;
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struct sk_buff *skb;
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/* We need some structs from the start cookie until termination */
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u16 vlan_tag;
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bool tpa_start_fail;
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u8 state;
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u8 frag_id;
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u8 tunnel_type;
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};
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struct qede_rx_queue {
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__le16 *hw_cons_ptr;
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void __iomem *hw_rxq_prod_addr;
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/* Required for the allocation of replacement buffers */
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struct device *dev;
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struct bpf_prog *xdp_prog;
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u16 sw_rx_cons;
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u16 sw_rx_prod;
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u16 filled_buffers;
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u8 data_direction;
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u8 rxq_id;
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/* Used once per each NAPI run */
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u16 num_rx_buffers;
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u16 rx_headroom;
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u32 rx_buf_size;
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u32 rx_buf_seg_size;
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struct sw_rx_data *sw_rx_ring;
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struct qed_chain rx_bd_ring;
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struct qed_chain rx_comp_ring ____cacheline_aligned;
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/* GRO */
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struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM];
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/* Used once per each NAPI run */
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u64 rcv_pkts;
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u64 rx_hw_errors;
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u64 rx_alloc_errors;
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u64 rx_ip_frags;
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u64 xdp_no_pass;
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void *handle;
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struct xdp_rxq_info xdp_rxq;
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};
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union db_prod {
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struct eth_db_data data;
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u32 raw;
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};
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struct sw_tx_bd {
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struct sk_buff *skb;
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u8 flags;
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/* Set on the first BD descriptor when there is a split BD */
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#define QEDE_TSO_SPLIT_BD BIT(0)
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};
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struct sw_tx_xdp {
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struct page *page;
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struct xdp_frame *xdpf;
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dma_addr_t mapping;
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};
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struct qede_tx_queue {
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u8 is_xdp;
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bool is_legacy;
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u16 sw_tx_cons;
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u16 sw_tx_prod;
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u16 num_tx_buffers; /* Slowpath only */
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u64 xmit_pkts;
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u64 stopped_cnt;
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u64 tx_mem_alloc_err;
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__le16 *hw_cons_ptr;
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/* Needed for the mapping of packets */
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struct device *dev;
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void __iomem *doorbell_addr;
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union db_prod tx_db;
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/* Spinlock for XDP queues in case of XDP_REDIRECT */
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spinlock_t xdp_tx_lock;
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int index; /* Slowpath only */
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#define QEDE_TXQ_XDP_TO_IDX(edev, txq) ((txq)->index - \
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QEDE_MAX_TSS_CNT(edev))
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#define QEDE_TXQ_IDX_TO_XDP(edev, idx) ((idx) + QEDE_MAX_TSS_CNT(edev))
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#define QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx) ((edev)->fp_num_rx + \
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((idx) % QEDE_TSS_COUNT(edev)))
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#define QEDE_NDEV_TXQ_ID_TO_TXQ_COS(edev, idx) ((idx) / QEDE_TSS_COUNT(edev))
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#define QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq) ((QEDE_TSS_COUNT(edev) * \
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(txq)->cos) + (txq)->index)
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#define QEDE_NDEV_TXQ_ID_TO_TXQ(edev, idx) \
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(&((edev)->fp_array[QEDE_NDEV_TXQ_ID_TO_FP_ID(edev, idx)].txq \
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[QEDE_NDEV_TXQ_ID_TO_TXQ_COS(edev, idx)]))
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#define QEDE_FP_TC0_TXQ(fp) (&((fp)->txq[0]))
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/* Regular Tx requires skb + metadata for release purpose,
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* while XDP requires the pages and the mapped address.
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*/
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union {
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struct sw_tx_bd *skbs;
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struct sw_tx_xdp *xdp;
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} sw_tx_ring;
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struct qed_chain tx_pbl;
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/* Slowpath; Should be kept in end [unless missing padding] */
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void *handle;
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u16 cos;
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u16 ndev_txq_id;
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};
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#define BD_UNMAP_ADDR(bd) HILO_U64(le32_to_cpu((bd)->addr.hi), \
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le32_to_cpu((bd)->addr.lo))
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#define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len) \
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do { \
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(bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr)); \
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(bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr)); \
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(bd)->nbytes = cpu_to_le16(len); \
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} while (0)
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#define BD_UNMAP_LEN(bd) (le16_to_cpu((bd)->nbytes))
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struct qede_fastpath {
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struct qede_dev *edev;
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u8 type;
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#define QEDE_FASTPATH_TX BIT(0)
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#define QEDE_FASTPATH_RX BIT(1)
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#define QEDE_FASTPATH_XDP BIT(2)
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#define QEDE_FASTPATH_COMBINED (QEDE_FASTPATH_TX | QEDE_FASTPATH_RX)
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u8 id;
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u8 xdp_xmit;
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#define QEDE_XDP_TX BIT(0)
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#define QEDE_XDP_REDIRECT BIT(1)
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struct napi_struct napi;
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struct qed_sb_info *sb_info;
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struct qede_rx_queue *rxq;
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struct qede_tx_queue *txq;
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struct qede_tx_queue *xdp_tx;
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char name[IFNAMSIZ + 8];
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};
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/* Debug print definitions */
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#define DP_NAME(edev) netdev_name((edev)->ndev)
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#define XMIT_PLAIN 0
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#define XMIT_L4_CSUM BIT(0)
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#define XMIT_LSO BIT(1)
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#define XMIT_ENC BIT(2)
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#define XMIT_ENC_GSO_L4_CSUM BIT(3)
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#define QEDE_CSUM_ERROR BIT(0)
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#define QEDE_CSUM_UNNECESSARY BIT(1)
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#define QEDE_TUNN_CSUM_UNNECESSARY BIT(2)
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#define QEDE_SP_RECOVERY 0
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#define QEDE_SP_RX_MODE 1
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#define QEDE_SP_RSVD1 2
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#define QEDE_SP_RSVD2 3
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#define QEDE_SP_HW_ERR 4
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#define QEDE_SP_ARFS_CONFIG 5
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#define QEDE_SP_AER 7
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#define QEDE_SP_DISABLE 8
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#ifdef CONFIG_RFS_ACCEL
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int qede_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb,
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u16 rxq_index, u32 flow_id);
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#define QEDE_SP_TASK_POLL_DELAY (5 * HZ)
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#endif
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void qede_process_arfs_filters(struct qede_dev *edev, bool free_fltr);
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void qede_poll_for_freeing_arfs_filters(struct qede_dev *edev);
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void qede_arfs_filter_op(void *dev, void *filter, u8 fw_rc);
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void qede_free_arfs(struct qede_dev *edev);
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int qede_alloc_arfs(struct qede_dev *edev);
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int qede_add_cls_rule(struct qede_dev *edev, struct ethtool_rxnfc *info);
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int qede_delete_flow_filter(struct qede_dev *edev, u64 cookie);
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int qede_get_cls_rule_entry(struct qede_dev *edev, struct ethtool_rxnfc *cmd);
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int qede_get_cls_rule_all(struct qede_dev *edev, struct ethtool_rxnfc *info,
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u32 *rule_locs);
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int qede_get_arfs_filter_count(struct qede_dev *edev);
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struct qede_reload_args {
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void (*func)(struct qede_dev *edev, struct qede_reload_args *args);
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union {
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netdev_features_t features;
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struct bpf_prog *new_prog;
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u16 mtu;
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} u;
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};
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/* Datapath functions definition */
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netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev);
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int qede_xdp_transmit(struct net_device *dev, int n_frames,
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struct xdp_frame **frames, u32 flags);
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u16 qede_select_queue(struct net_device *dev, struct sk_buff *skb,
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struct net_device *sb_dev);
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netdev_features_t qede_features_check(struct sk_buff *skb,
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struct net_device *dev,
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netdev_features_t features);
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int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy);
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int qede_free_tx_pkt(struct qede_dev *edev,
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struct qede_tx_queue *txq, int *len);
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int qede_poll(struct napi_struct *napi, int budget);
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irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie);
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/* Filtering function definitions */
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void qede_force_mac(void *dev, u8 *mac, bool forced);
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void qede_udp_ports_update(void *dev, u16 vxlan_port, u16 geneve_port);
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int qede_set_mac_addr(struct net_device *ndev, void *p);
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int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid);
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int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid);
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void qede_vlan_mark_nonconfigured(struct qede_dev *edev);
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int qede_configure_vlan_filters(struct qede_dev *edev);
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netdev_features_t qede_fix_features(struct net_device *dev,
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netdev_features_t features);
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int qede_set_features(struct net_device *dev, netdev_features_t features);
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void qede_set_rx_mode(struct net_device *ndev);
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void qede_config_rx_mode(struct net_device *ndev);
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void qede_fill_rss_params(struct qede_dev *edev,
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struct qed_update_vport_rss_params *rss, u8 *update);
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void qede_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti);
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void qede_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti);
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int qede_xdp(struct net_device *dev, struct netdev_bpf *xdp);
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#ifdef CONFIG_DCB
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void qede_set_dcbnl_ops(struct net_device *ndev);
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#endif
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void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level);
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void qede_set_ethtool_ops(struct net_device *netdev);
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void qede_set_udp_tunnels(struct qede_dev *edev);
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void qede_reload(struct qede_dev *edev,
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struct qede_reload_args *args, bool is_locked);
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int qede_change_mtu(struct net_device *dev, int new_mtu);
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void qede_fill_by_demand_stats(struct qede_dev *edev);
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void __qede_lock(struct qede_dev *edev);
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void __qede_unlock(struct qede_dev *edev);
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bool qede_has_rx_work(struct qede_rx_queue *rxq);
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int qede_txq_has_work(struct qede_tx_queue *txq);
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void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count);
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void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq);
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int qede_add_tc_flower_fltr(struct qede_dev *edev, __be16 proto,
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struct flow_cls_offload *f);
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void qede_forced_speed_maps_init(void);
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int qede_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal,
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struct kernel_ethtool_coalesce *kernel_coal,
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struct netlink_ext_ack *extack);
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int qede_set_per_coalesce(struct net_device *dev, u32 queue,
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struct ethtool_coalesce *coal);
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#define RX_RING_SIZE_POW 13
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#define RX_RING_SIZE ((u16)BIT(RX_RING_SIZE_POW))
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#define NUM_RX_BDS_MAX (RX_RING_SIZE - 1)
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#define NUM_RX_BDS_MIN 128
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#define NUM_RX_BDS_KDUMP_MIN 63
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#define NUM_RX_BDS_DEF ((u16)BIT(10) - 1)
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#define TX_RING_SIZE_POW 13
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#define TX_RING_SIZE ((u16)BIT(TX_RING_SIZE_POW))
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#define NUM_TX_BDS_MAX (TX_RING_SIZE - 1)
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#define NUM_TX_BDS_MIN 128
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#define NUM_TX_BDS_KDUMP_MIN 63
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#define NUM_TX_BDS_DEF NUM_TX_BDS_MAX
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#define QEDE_MIN_PKT_LEN 64
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#define QEDE_RX_HDR_SIZE 256
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#define QEDE_MAX_JUMBO_PACKET_SIZE 9600
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#define for_each_queue(i) for (i = 0; i < edev->num_queues; i++)
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#define for_each_cos_in_txq(edev, var) \
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for ((var) = 0; (var) < (edev)->dev_info.num_tc; (var)++)
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#endif /* _QEDE_H_ */
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