136 lines
3.8 KiB
C
136 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// tcan4x5x - Texas Instruments TCAN4x5x Family CAN controller driver
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//
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// Copyright (c) 2020 Pengutronix,
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// Marc Kleine-Budde <kernel@pengutronix.de>
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// Copyright (c) 2018-2019 Texas Instruments Incorporated
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// http://www.ti.com/
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#include "tcan4x5x.h"
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#define TCAN4X5X_SPI_INSTRUCTION_WRITE (0x61 << 24)
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#define TCAN4X5X_SPI_INSTRUCTION_READ (0x41 << 24)
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#define TCAN4X5X_MAX_REGISTER 0x87fc
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static int tcan4x5x_regmap_gather_write(void *context,
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const void *reg, size_t reg_len,
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const void *val, size_t val_len)
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{
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struct spi_device *spi = context;
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struct tcan4x5x_priv *priv = spi_get_drvdata(spi);
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struct tcan4x5x_map_buf *buf_tx = &priv->map_buf_tx;
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struct spi_transfer xfer[] = {
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{
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.tx_buf = buf_tx,
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.len = sizeof(buf_tx->cmd) + val_len,
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},
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};
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memcpy(&buf_tx->cmd, reg, sizeof(buf_tx->cmd.cmd) +
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sizeof(buf_tx->cmd.addr));
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tcan4x5x_spi_cmd_set_len(&buf_tx->cmd, val_len);
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memcpy(buf_tx->data, val, val_len);
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return spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer));
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}
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static int tcan4x5x_regmap_write(void *context, const void *data, size_t count)
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{
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return tcan4x5x_regmap_gather_write(context, data, sizeof(__be32),
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data + sizeof(__be32),
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count - sizeof(__be32));
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}
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static int tcan4x5x_regmap_read(void *context,
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const void *reg_buf, size_t reg_len,
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void *val_buf, size_t val_len)
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{
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struct spi_device *spi = context;
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struct tcan4x5x_priv *priv = spi_get_drvdata(spi);
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struct tcan4x5x_map_buf *buf_rx = &priv->map_buf_rx;
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struct tcan4x5x_map_buf *buf_tx = &priv->map_buf_tx;
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struct spi_transfer xfer[2] = {
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{
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.tx_buf = buf_tx,
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}
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};
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struct spi_message msg;
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int err;
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spi_message_init(&msg);
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spi_message_add_tail(&xfer[0], &msg);
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memcpy(&buf_tx->cmd, reg_buf, sizeof(buf_tx->cmd.cmd) +
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sizeof(buf_tx->cmd.addr));
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tcan4x5x_spi_cmd_set_len(&buf_tx->cmd, val_len);
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if (spi->controller->flags & SPI_CONTROLLER_HALF_DUPLEX) {
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xfer[0].len = sizeof(buf_tx->cmd);
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xfer[1].rx_buf = val_buf;
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xfer[1].len = val_len;
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spi_message_add_tail(&xfer[1], &msg);
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} else {
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xfer[0].rx_buf = buf_rx;
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xfer[0].len = sizeof(buf_tx->cmd) + val_len;
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if (TCAN4X5X_SANITIZE_SPI)
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memset(buf_tx->data, 0x0, val_len);
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}
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err = spi_sync(spi, &msg);
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if (err)
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return err;
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if (!(spi->controller->flags & SPI_CONTROLLER_HALF_DUPLEX))
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memcpy(val_buf, buf_rx->data, val_len);
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return 0;
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}
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static const struct regmap_range tcan4x5x_reg_table_yes_range[] = {
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regmap_reg_range(0x0000, 0x002c), /* Device ID and SPI Registers */
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regmap_reg_range(0x0800, 0x083c), /* Device configuration registers and Interrupt Flags*/
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regmap_reg_range(0x1000, 0x10fc), /* M_CAN */
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regmap_reg_range(0x8000, 0x87fc), /* MRAM */
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};
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static const struct regmap_access_table tcan4x5x_reg_table = {
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.yes_ranges = tcan4x5x_reg_table_yes_range,
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.n_yes_ranges = ARRAY_SIZE(tcan4x5x_reg_table_yes_range),
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};
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static const struct regmap_config tcan4x5x_regmap = {
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.reg_bits = 24,
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.reg_stride = 4,
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.pad_bits = 8,
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.val_bits = 32,
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.wr_table = &tcan4x5x_reg_table,
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.rd_table = &tcan4x5x_reg_table,
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.max_register = TCAN4X5X_MAX_REGISTER,
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.cache_type = REGCACHE_NONE,
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.read_flag_mask = (__force unsigned long)
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cpu_to_be32(TCAN4X5X_SPI_INSTRUCTION_READ),
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.write_flag_mask = (__force unsigned long)
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cpu_to_be32(TCAN4X5X_SPI_INSTRUCTION_WRITE),
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};
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static const struct regmap_bus tcan4x5x_bus = {
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.write = tcan4x5x_regmap_write,
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.gather_write = tcan4x5x_regmap_gather_write,
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.read = tcan4x5x_regmap_read,
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.reg_format_endian_default = REGMAP_ENDIAN_BIG,
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.val_format_endian_default = REGMAP_ENDIAN_BIG,
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.max_raw_read = 256,
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.max_raw_write = 256,
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};
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int tcan4x5x_regmap_init(struct tcan4x5x_priv *priv)
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{
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priv->regmap = devm_regmap_init(&priv->spi->dev, &tcan4x5x_bus,
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priv->spi, &tcan4x5x_regmap);
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return PTR_ERR_OR_ZERO(priv->regmap);
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}
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