736 lines
20 KiB
C
736 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Generic Error-Correcting Code (ECC) engine
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*
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* Copyright (C) 2019 Macronix
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* Author:
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* Miquèl RAYNAL <miquel.raynal@bootlin.com>
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*
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*
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* This file describes the abstraction of any NAND ECC engine. It has been
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* designed to fit most cases, including parallel NANDs and SPI-NANDs.
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*
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* There are three main situations where instantiating this ECC engine makes
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* sense:
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* - external: The ECC engine is outside the NAND pipeline, typically this
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* is a software ECC engine, or an hardware engine that is
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* outside the NAND controller pipeline.
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* - pipelined: The ECC engine is inside the NAND pipeline, ie. on the
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* controller's side. This is the case of most of the raw NAND
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* controllers. In the pipeline case, the ECC bytes are
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* generated/data corrected on the fly when a page is
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* written/read.
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* - ondie: The ECC engine is inside the NAND pipeline, on the chip's side.
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* Some NAND chips can correct themselves the data.
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*
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* Besides the initial setup and final cleanups, the interfaces are rather
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* simple:
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* - prepare: Prepare an I/O request. Enable/disable the ECC engine based on
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* the I/O request type. In case of software correction or external
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* engine, this step may involve to derive the ECC bytes and place
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* them in the OOB area before a write.
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* - finish: Finish an I/O request. Correct the data in case of a read
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* request and report the number of corrected bits/uncorrectable
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* errors. Most likely empty for write operations, unless you have
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* hardware specific stuff to do, like shutting down the engine to
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* save power.
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*
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* The I/O request should be enclosed in a prepare()/finish() pair of calls
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* and will behave differently depending on the requested I/O type:
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* - raw: Correction disabled
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* - ecc: Correction enabled
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*
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* The request direction is impacting the logic as well:
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* - read: Load data from the NAND chip
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* - write: Store data in the NAND chip
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*
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* Mixing all this combinations together gives the following behavior.
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* Those are just examples, drivers are free to add custom steps in their
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* prepare/finish hook.
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*
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* [external ECC engine]
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* - external + prepare + raw + read: do nothing
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* - external + finish + raw + read: do nothing
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* - external + prepare + raw + write: do nothing
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* - external + finish + raw + write: do nothing
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* - external + prepare + ecc + read: do nothing
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* - external + finish + ecc + read: calculate expected ECC bytes, extract
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* ECC bytes from OOB buffer, correct
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* and report any bitflip/error
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* - external + prepare + ecc + write: calculate ECC bytes and store them at
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* the right place in the OOB buffer based
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* on the OOB layout
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* - external + finish + ecc + write: do nothing
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*
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* [pipelined ECC engine]
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* - pipelined + prepare + raw + read: disable the controller's ECC engine if
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* activated
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* - pipelined + finish + raw + read: do nothing
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* - pipelined + prepare + raw + write: disable the controller's ECC engine if
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* activated
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* - pipelined + finish + raw + write: do nothing
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* - pipelined + prepare + ecc + read: enable the controller's ECC engine if
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* deactivated
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* - pipelined + finish + ecc + read: check the status, report any
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* error/bitflip
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* - pipelined + prepare + ecc + write: enable the controller's ECC engine if
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* deactivated
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* - pipelined + finish + ecc + write: do nothing
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*
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* [ondie ECC engine]
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* - ondie + prepare + raw + read: send commands to disable the on-chip ECC
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* engine if activated
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* - ondie + finish + raw + read: do nothing
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* - ondie + prepare + raw + write: send commands to disable the on-chip ECC
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* engine if activated
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* - ondie + finish + raw + write: do nothing
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* - ondie + prepare + ecc + read: send commands to enable the on-chip ECC
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* engine if deactivated
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* - ondie + finish + ecc + read: send commands to check the status, report
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* any error/bitflip
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* - ondie + prepare + ecc + write: send commands to enable the on-chip ECC
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* engine if deactivated
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* - ondie + finish + ecc + write: do nothing
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*/
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#include <linux/module.h>
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#include <linux/mtd/nand.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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static LIST_HEAD(on_host_hw_engines);
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static DEFINE_MUTEX(on_host_hw_engines_mutex);
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/**
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* nand_ecc_init_ctx - Init the ECC engine context
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* @nand: the NAND device
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*
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* On success, the caller is responsible of calling @nand_ecc_cleanup_ctx().
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*/
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int nand_ecc_init_ctx(struct nand_device *nand)
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{
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if (!nand->ecc.engine || !nand->ecc.engine->ops->init_ctx)
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return 0;
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return nand->ecc.engine->ops->init_ctx(nand);
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}
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EXPORT_SYMBOL(nand_ecc_init_ctx);
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/**
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* nand_ecc_cleanup_ctx - Cleanup the ECC engine context
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* @nand: the NAND device
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*/
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void nand_ecc_cleanup_ctx(struct nand_device *nand)
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{
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if (nand->ecc.engine && nand->ecc.engine->ops->cleanup_ctx)
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nand->ecc.engine->ops->cleanup_ctx(nand);
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}
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EXPORT_SYMBOL(nand_ecc_cleanup_ctx);
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/**
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* nand_ecc_prepare_io_req - Prepare an I/O request
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* @nand: the NAND device
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* @req: the I/O request
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*/
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int nand_ecc_prepare_io_req(struct nand_device *nand,
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struct nand_page_io_req *req)
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{
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if (!nand->ecc.engine || !nand->ecc.engine->ops->prepare_io_req)
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return 0;
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return nand->ecc.engine->ops->prepare_io_req(nand, req);
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}
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EXPORT_SYMBOL(nand_ecc_prepare_io_req);
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/**
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* nand_ecc_finish_io_req - Finish an I/O request
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* @nand: the NAND device
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* @req: the I/O request
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*/
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int nand_ecc_finish_io_req(struct nand_device *nand,
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struct nand_page_io_req *req)
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{
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if (!nand->ecc.engine || !nand->ecc.engine->ops->finish_io_req)
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return 0;
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return nand->ecc.engine->ops->finish_io_req(nand, req);
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}
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EXPORT_SYMBOL(nand_ecc_finish_io_req);
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/* Define default OOB placement schemes for large and small page devices */
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static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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if (section > 1)
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return -ERANGE;
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if (!section) {
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oobregion->offset = 0;
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if (mtd->oobsize == 16)
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oobregion->length = 4;
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else
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oobregion->length = 3;
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} else {
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if (mtd->oobsize == 8)
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return -ERANGE;
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oobregion->offset = 6;
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oobregion->length = total_ecc_bytes - 4;
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}
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return 0;
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}
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static int nand_ooblayout_free_sp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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if (section > 1)
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return -ERANGE;
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if (mtd->oobsize == 16) {
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if (section)
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return -ERANGE;
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oobregion->length = 8;
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oobregion->offset = 8;
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} else {
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oobregion->length = 2;
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if (!section)
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oobregion->offset = 3;
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else
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oobregion->offset = 6;
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}
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return 0;
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}
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static const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
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.ecc = nand_ooblayout_ecc_sp,
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.free = nand_ooblayout_free_sp,
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};
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const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void)
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{
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return &nand_ooblayout_sp_ops;
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}
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EXPORT_SYMBOL_GPL(nand_get_small_page_ooblayout);
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static int nand_ooblayout_ecc_lp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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if (section || !total_ecc_bytes)
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return -ERANGE;
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oobregion->length = total_ecc_bytes;
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oobregion->offset = mtd->oobsize - oobregion->length;
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return 0;
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}
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static int nand_ooblayout_free_lp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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if (section)
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return -ERANGE;
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oobregion->length = mtd->oobsize - total_ecc_bytes - 2;
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oobregion->offset = 2;
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return 0;
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}
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static const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
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.ecc = nand_ooblayout_ecc_lp,
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.free = nand_ooblayout_free_lp,
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};
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const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void)
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{
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return &nand_ooblayout_lp_ops;
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}
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EXPORT_SYMBOL_GPL(nand_get_large_page_ooblayout);
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/*
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* Support the old "large page" layout used for 1-bit Hamming ECC where ECC
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* are placed at a fixed offset.
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*/
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static int nand_ooblayout_ecc_lp_hamming(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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if (section)
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return -ERANGE;
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switch (mtd->oobsize) {
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case 64:
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oobregion->offset = 40;
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break;
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case 128:
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oobregion->offset = 80;
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break;
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default:
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return -EINVAL;
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}
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oobregion->length = total_ecc_bytes;
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if (oobregion->offset + oobregion->length > mtd->oobsize)
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return -ERANGE;
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return 0;
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}
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static int nand_ooblayout_free_lp_hamming(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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int ecc_offset = 0;
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if (section < 0 || section > 1)
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return -ERANGE;
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switch (mtd->oobsize) {
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case 64:
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ecc_offset = 40;
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break;
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case 128:
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ecc_offset = 80;
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break;
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default:
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return -EINVAL;
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}
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if (section == 0) {
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oobregion->offset = 2;
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oobregion->length = ecc_offset - 2;
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} else {
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oobregion->offset = ecc_offset + total_ecc_bytes;
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oobregion->length = mtd->oobsize - oobregion->offset;
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}
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return 0;
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}
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static const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = {
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.ecc = nand_ooblayout_ecc_lp_hamming,
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.free = nand_ooblayout_free_lp_hamming,
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};
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const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
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{
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return &nand_ooblayout_lp_hamming_ops;
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}
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EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
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static enum nand_ecc_engine_type
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of_get_nand_ecc_engine_type(struct device_node *np)
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{
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struct device_node *eng_np;
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if (of_property_read_bool(np, "nand-no-ecc-engine"))
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return NAND_ECC_ENGINE_TYPE_NONE;
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if (of_property_read_bool(np, "nand-use-soft-ecc-engine"))
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return NAND_ECC_ENGINE_TYPE_SOFT;
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eng_np = of_parse_phandle(np, "nand-ecc-engine", 0);
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of_node_put(eng_np);
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if (eng_np) {
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if (eng_np == np)
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return NAND_ECC_ENGINE_TYPE_ON_DIE;
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else
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return NAND_ECC_ENGINE_TYPE_ON_HOST;
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}
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return NAND_ECC_ENGINE_TYPE_INVALID;
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}
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static const char * const nand_ecc_placement[] = {
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[NAND_ECC_PLACEMENT_OOB] = "oob",
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[NAND_ECC_PLACEMENT_INTERLEAVED] = "interleaved",
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};
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static enum nand_ecc_placement of_get_nand_ecc_placement(struct device_node *np)
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{
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enum nand_ecc_placement placement;
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const char *pm;
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int err;
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err = of_property_read_string(np, "nand-ecc-placement", &pm);
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if (!err) {
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for (placement = NAND_ECC_PLACEMENT_OOB;
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placement < ARRAY_SIZE(nand_ecc_placement); placement++) {
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if (!strcasecmp(pm, nand_ecc_placement[placement]))
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return placement;
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}
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}
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return NAND_ECC_PLACEMENT_UNKNOWN;
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}
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static const char * const nand_ecc_algos[] = {
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[NAND_ECC_ALGO_HAMMING] = "hamming",
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[NAND_ECC_ALGO_BCH] = "bch",
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[NAND_ECC_ALGO_RS] = "rs",
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};
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static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
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{
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enum nand_ecc_algo ecc_algo;
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const char *pm;
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int err;
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err = of_property_read_string(np, "nand-ecc-algo", &pm);
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if (!err) {
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for (ecc_algo = NAND_ECC_ALGO_HAMMING;
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ecc_algo < ARRAY_SIZE(nand_ecc_algos);
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ecc_algo++) {
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if (!strcasecmp(pm, nand_ecc_algos[ecc_algo]))
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return ecc_algo;
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}
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}
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return NAND_ECC_ALGO_UNKNOWN;
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}
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static int of_get_nand_ecc_step_size(struct device_node *np)
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{
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int ret;
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u32 val;
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ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
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return ret ? ret : val;
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}
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static int of_get_nand_ecc_strength(struct device_node *np)
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{
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int ret;
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u32 val;
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ret = of_property_read_u32(np, "nand-ecc-strength", &val);
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return ret ? ret : val;
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}
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void of_get_nand_ecc_user_config(struct nand_device *nand)
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{
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struct device_node *dn = nanddev_get_of_node(nand);
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int strength, size;
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nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn);
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nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn);
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nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn);
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strength = of_get_nand_ecc_strength(dn);
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if (strength >= 0)
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nand->ecc.user_conf.strength = strength;
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size = of_get_nand_ecc_step_size(dn);
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if (size >= 0)
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nand->ecc.user_conf.step_size = size;
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if (of_property_read_bool(dn, "nand-ecc-maximize"))
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nand->ecc.user_conf.flags |= NAND_ECC_MAXIMIZE_STRENGTH;
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}
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EXPORT_SYMBOL(of_get_nand_ecc_user_config);
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/**
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* nand_ecc_is_strong_enough - Check if the chip configuration meets the
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* datasheet requirements.
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*
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* @nand: Device to check
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*
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* If our configuration corrects A bits per B bytes and the minimum
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* required correction level is X bits per Y bytes, then we must ensure
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* both of the following are true:
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*
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* (1) A / B >= X / Y
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* (2) A >= X
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*
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* Requirement (1) ensures we can correct for the required bitflip density.
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* Requirement (2) ensures we can correct even when all bitflips are clumped
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* in the same sector.
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*/
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bool nand_ecc_is_strong_enough(struct nand_device *nand)
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{
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const struct nand_ecc_props *reqs = nanddev_get_ecc_requirements(nand);
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const struct nand_ecc_props *conf = nanddev_get_ecc_conf(nand);
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struct mtd_info *mtd = nanddev_to_mtd(nand);
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int corr, ds_corr;
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if (conf->step_size == 0 || reqs->step_size == 0)
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/* Not enough information */
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return true;
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/*
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* We get the number of corrected bits per page to compare
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* the correction density.
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*/
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corr = (mtd->writesize * conf->strength) / conf->step_size;
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ds_corr = (mtd->writesize * reqs->strength) / reqs->step_size;
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return corr >= ds_corr && conf->strength >= reqs->strength;
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}
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EXPORT_SYMBOL(nand_ecc_is_strong_enough);
|
|
|
|
/* ECC engine driver internal helpers */
|
|
int nand_ecc_init_req_tweaking(struct nand_ecc_req_tweak_ctx *ctx,
|
|
struct nand_device *nand)
|
|
{
|
|
unsigned int total_buffer_size;
|
|
|
|
ctx->nand = nand;
|
|
|
|
/* Let the user decide the exact length of each buffer */
|
|
if (!ctx->page_buffer_size)
|
|
ctx->page_buffer_size = nanddev_page_size(nand);
|
|
if (!ctx->oob_buffer_size)
|
|
ctx->oob_buffer_size = nanddev_per_page_oobsize(nand);
|
|
|
|
total_buffer_size = ctx->page_buffer_size + ctx->oob_buffer_size;
|
|
|
|
ctx->spare_databuf = kzalloc(total_buffer_size, GFP_KERNEL);
|
|
if (!ctx->spare_databuf)
|
|
return -ENOMEM;
|
|
|
|
ctx->spare_oobbuf = ctx->spare_databuf + ctx->page_buffer_size;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(nand_ecc_init_req_tweaking);
|
|
|
|
void nand_ecc_cleanup_req_tweaking(struct nand_ecc_req_tweak_ctx *ctx)
|
|
{
|
|
kfree(ctx->spare_databuf);
|
|
}
|
|
EXPORT_SYMBOL_GPL(nand_ecc_cleanup_req_tweaking);
|
|
|
|
/*
|
|
* Ensure data and OOB area is fully read/written otherwise the correction might
|
|
* not work as expected.
|
|
*/
|
|
void nand_ecc_tweak_req(struct nand_ecc_req_tweak_ctx *ctx,
|
|
struct nand_page_io_req *req)
|
|
{
|
|
struct nand_device *nand = ctx->nand;
|
|
struct nand_page_io_req *orig, *tweak;
|
|
|
|
/* Save the original request */
|
|
ctx->orig_req = *req;
|
|
ctx->bounce_data = false;
|
|
ctx->bounce_oob = false;
|
|
orig = &ctx->orig_req;
|
|
tweak = req;
|
|
|
|
/* Ensure the request covers the entire page */
|
|
if (orig->datalen < nanddev_page_size(nand)) {
|
|
ctx->bounce_data = true;
|
|
tweak->dataoffs = 0;
|
|
tweak->datalen = nanddev_page_size(nand);
|
|
tweak->databuf.in = ctx->spare_databuf;
|
|
memset(tweak->databuf.in, 0xFF, ctx->page_buffer_size);
|
|
}
|
|
|
|
if (orig->ooblen < nanddev_per_page_oobsize(nand)) {
|
|
ctx->bounce_oob = true;
|
|
tweak->ooboffs = 0;
|
|
tweak->ooblen = nanddev_per_page_oobsize(nand);
|
|
tweak->oobbuf.in = ctx->spare_oobbuf;
|
|
memset(tweak->oobbuf.in, 0xFF, ctx->oob_buffer_size);
|
|
}
|
|
|
|
/* Copy the data that must be writen in the bounce buffers, if needed */
|
|
if (orig->type == NAND_PAGE_WRITE) {
|
|
if (ctx->bounce_data)
|
|
memcpy((void *)tweak->databuf.out + orig->dataoffs,
|
|
orig->databuf.out, orig->datalen);
|
|
|
|
if (ctx->bounce_oob)
|
|
memcpy((void *)tweak->oobbuf.out + orig->ooboffs,
|
|
orig->oobbuf.out, orig->ooblen);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL_GPL(nand_ecc_tweak_req);
|
|
|
|
void nand_ecc_restore_req(struct nand_ecc_req_tweak_ctx *ctx,
|
|
struct nand_page_io_req *req)
|
|
{
|
|
struct nand_page_io_req *orig, *tweak;
|
|
|
|
orig = &ctx->orig_req;
|
|
tweak = req;
|
|
|
|
/* Restore the data read from the bounce buffers, if needed */
|
|
if (orig->type == NAND_PAGE_READ) {
|
|
if (ctx->bounce_data)
|
|
memcpy(orig->databuf.in,
|
|
tweak->databuf.in + orig->dataoffs,
|
|
orig->datalen);
|
|
|
|
if (ctx->bounce_oob)
|
|
memcpy(orig->oobbuf.in,
|
|
tweak->oobbuf.in + orig->ooboffs,
|
|
orig->ooblen);
|
|
}
|
|
|
|
/* Ensure the original request is restored */
|
|
*req = *orig;
|
|
}
|
|
EXPORT_SYMBOL_GPL(nand_ecc_restore_req);
|
|
|
|
struct nand_ecc_engine *nand_ecc_get_sw_engine(struct nand_device *nand)
|
|
{
|
|
unsigned int algo = nand->ecc.user_conf.algo;
|
|
|
|
if (algo == NAND_ECC_ALGO_UNKNOWN)
|
|
algo = nand->ecc.defaults.algo;
|
|
|
|
switch (algo) {
|
|
case NAND_ECC_ALGO_HAMMING:
|
|
return nand_ecc_sw_hamming_get_engine();
|
|
case NAND_ECC_ALGO_BCH:
|
|
return nand_ecc_sw_bch_get_engine();
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL(nand_ecc_get_sw_engine);
|
|
|
|
struct nand_ecc_engine *nand_ecc_get_on_die_hw_engine(struct nand_device *nand)
|
|
{
|
|
return nand->ecc.ondie_engine;
|
|
}
|
|
EXPORT_SYMBOL(nand_ecc_get_on_die_hw_engine);
|
|
|
|
int nand_ecc_register_on_host_hw_engine(struct nand_ecc_engine *engine)
|
|
{
|
|
struct nand_ecc_engine *item;
|
|
|
|
if (!engine)
|
|
return -EINVAL;
|
|
|
|
/* Prevent multiple registrations of one engine */
|
|
list_for_each_entry(item, &on_host_hw_engines, node)
|
|
if (item == engine)
|
|
return 0;
|
|
|
|
mutex_lock(&on_host_hw_engines_mutex);
|
|
list_add_tail(&engine->node, &on_host_hw_engines);
|
|
mutex_unlock(&on_host_hw_engines_mutex);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(nand_ecc_register_on_host_hw_engine);
|
|
|
|
int nand_ecc_unregister_on_host_hw_engine(struct nand_ecc_engine *engine)
|
|
{
|
|
if (!engine)
|
|
return -EINVAL;
|
|
|
|
mutex_lock(&on_host_hw_engines_mutex);
|
|
list_del(&engine->node);
|
|
mutex_unlock(&on_host_hw_engines_mutex);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(nand_ecc_unregister_on_host_hw_engine);
|
|
|
|
static struct nand_ecc_engine *nand_ecc_match_on_host_hw_engine(struct device *dev)
|
|
{
|
|
struct nand_ecc_engine *item;
|
|
|
|
list_for_each_entry(item, &on_host_hw_engines, node)
|
|
if (item->dev == dev)
|
|
return item;
|
|
|
|
return NULL;
|
|
}
|
|
|
|
struct nand_ecc_engine *nand_ecc_get_on_host_hw_engine(struct nand_device *nand)
|
|
{
|
|
struct nand_ecc_engine *engine = NULL;
|
|
struct device *dev = &nand->mtd.dev;
|
|
struct platform_device *pdev;
|
|
struct device_node *np;
|
|
|
|
if (list_empty(&on_host_hw_engines))
|
|
return NULL;
|
|
|
|
/* Check for an explicit nand-ecc-engine property */
|
|
np = of_parse_phandle(dev->of_node, "nand-ecc-engine", 0);
|
|
if (np) {
|
|
pdev = of_find_device_by_node(np);
|
|
if (!pdev)
|
|
return ERR_PTR(-EPROBE_DEFER);
|
|
|
|
engine = nand_ecc_match_on_host_hw_engine(&pdev->dev);
|
|
platform_device_put(pdev);
|
|
of_node_put(np);
|
|
|
|
if (!engine)
|
|
return ERR_PTR(-EPROBE_DEFER);
|
|
}
|
|
|
|
if (engine)
|
|
get_device(engine->dev);
|
|
|
|
return engine;
|
|
}
|
|
EXPORT_SYMBOL(nand_ecc_get_on_host_hw_engine);
|
|
|
|
void nand_ecc_put_on_host_hw_engine(struct nand_device *nand)
|
|
{
|
|
put_device(nand->ecc.engine->dev);
|
|
}
|
|
EXPORT_SYMBOL(nand_ecc_put_on_host_hw_engine);
|
|
|
|
/*
|
|
* In the case of a pipelined engine, the device registering the ECC
|
|
* engine is not necessarily the ECC engine itself but may be a host controller.
|
|
* It is then useful to provide a helper to retrieve the right device object
|
|
* which actually represents the ECC engine.
|
|
*/
|
|
struct device *nand_ecc_get_engine_dev(struct device *host)
|
|
{
|
|
struct platform_device *ecc_pdev;
|
|
struct device_node *np;
|
|
|
|
/*
|
|
* If the device node contains this property, it means we need to follow
|
|
* it in order to get the right ECC engine device we are looking for.
|
|
*/
|
|
np = of_parse_phandle(host->of_node, "nand-ecc-engine", 0);
|
|
if (!np)
|
|
return host;
|
|
|
|
ecc_pdev = of_find_device_by_node(np);
|
|
if (!ecc_pdev) {
|
|
of_node_put(np);
|
|
return NULL;
|
|
}
|
|
|
|
platform_device_put(ecc_pdev);
|
|
of_node_put(np);
|
|
|
|
return &ecc_pdev->dev;
|
|
}
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Miquel Raynal <miquel.raynal@bootlin.com>");
|
|
MODULE_DESCRIPTION("Generic ECC engine");
|