80 lines
2.7 KiB
C
80 lines
2.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright (c) 2020, MIPI Alliance, Inc.
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*
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* Author: Nicolas Pitre <npitre@baylibre.com>
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*
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* Transfer Mode/Rate Table definitions as found in extended capability
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* sections 0x04 and 0x08.
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* This applies starting from I3C HCI v2.0.
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*/
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#ifndef XFER_MODE_RATE_H
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#define XFER_MODE_RATE_H
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/*
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* Master Transfer Mode Table Fixed Indexes.
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*
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* Indexes 0x0 and 0x8 are mandatory. Availability for the rest must be
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* obtained from the mode table in the extended capability area.
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* Presence and definitions for indexes beyond these ones may vary.
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*/
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#define XFERMODE_IDX_I3C_SDR 0x00 /* I3C SDR Mode */
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#define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
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#define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
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#define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
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#define XFERMODE_IDX_I2C 0x08 /* Legacy I2C Mode */
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/*
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* Transfer Mode Table Entry Bits Definitions
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*/
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#define XFERMODE_VALID_XFER_ADD_FUNC GENMASK(21, 16)
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#define XFERMODE_ML_DATA_XFER_CODING GENMASK(15, 11)
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#define XFERMODE_ML_ADDL_LANES GENMASK(10, 8)
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#define XFERMODE_SUPPORTED BIT(7)
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#define XFERMODE_MODE GENMASK(3, 0)
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/*
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* Master Data Transfer Rate Selector Values.
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*
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* These are the values to be used in the command descriptor XFER_RATE field
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* and found in the RATE_ID field below.
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* The I3C_SDR0, I3C_SDR1, I3C_SDR2, I3C_SDR3, I3C_SDR4 and I2C_FM rates
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* are required, everything else is optional and discoverable in the
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* Data Transfer Rate Table. Indicated are typical rates. The actual
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* rates may vary slightly and are also specified in the Data Transfer
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* Rate Table.
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*/
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#define XFERRATE_I3C_SDR0 0x00 /* 12.5 MHz */
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#define XFERRATE_I3C_SDR1 0x01 /* 8 MHz */
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#define XFERRATE_I3C_SDR2 0x02 /* 6 MHz */
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#define XFERRATE_I3C_SDR3 0x03 /* 4 MHz */
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#define XFERRATE_I3C_SDR4 0x04 /* 2 MHz */
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#define XFERRATE_I3C_SDR_FM_FMP 0x05 /* 400 KHz / 1 MHz */
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#define XFERRATE_I3C_SDR_USER6 0x06 /* User Defined */
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#define XFERRATE_I3C_SDR_USER7 0x07 /* User Defined */
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#define XFERRATE_I2C_FM 0x00 /* 400 KHz */
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#define XFERRATE_I2C_FMP 0x01 /* 1 MHz */
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#define XFERRATE_I2C_USER2 0x02 /* User Defined */
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#define XFERRATE_I2C_USER3 0x03 /* User Defined */
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#define XFERRATE_I2C_USER4 0x04 /* User Defined */
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#define XFERRATE_I2C_USER5 0x05 /* User Defined */
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#define XFERRATE_I2C_USER6 0x06 /* User Defined */
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#define XFERRATE_I2C_USER7 0x07 /* User Defined */
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/*
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* Master Data Transfer Rate Table Mode ID values.
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*/
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#define XFERRATE_MODE_I3C 0x00
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#define XFERRATE_MODE_I2C 0x08
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/*
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* Master Data Transfer Rate Table Entry Bits Definitions
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*/
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#define XFERRATE_MODE_ID GENMASK(31, 28)
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#define XFERRATE_RATE_ID GENMASK(22, 20)
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#define XFERRATE_ACTUAL_RATE_KHZ GENMASK(19, 0)
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#endif
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