178 lines
5.4 KiB
C
178 lines
5.4 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*
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*/
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#ifndef _CGS_COMMON_H
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#define _CGS_COMMON_H
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#include "amd_shared.h"
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struct cgs_device;
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/**
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* enum cgs_ind_reg - Indirect register spaces
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*/
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enum cgs_ind_reg {
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CGS_IND_REG__PCIE,
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CGS_IND_REG__SMC,
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CGS_IND_REG__UVD_CTX,
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CGS_IND_REG__DIDT,
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CGS_IND_REG_GC_CAC,
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CGS_IND_REG_SE_CAC,
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CGS_IND_REG__AUDIO_ENDPT
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};
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/*
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* enum cgs_ucode_id - Firmware types for different IPs
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*/
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enum cgs_ucode_id {
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CGS_UCODE_ID_SMU = 0,
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CGS_UCODE_ID_SMU_SK,
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CGS_UCODE_ID_SDMA0,
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CGS_UCODE_ID_SDMA1,
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CGS_UCODE_ID_CP_CE,
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CGS_UCODE_ID_CP_PFP,
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CGS_UCODE_ID_CP_ME,
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CGS_UCODE_ID_CP_MEC,
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CGS_UCODE_ID_CP_MEC_JT1,
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CGS_UCODE_ID_CP_MEC_JT2,
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CGS_UCODE_ID_GMCON_RENG,
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CGS_UCODE_ID_RLC_G,
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CGS_UCODE_ID_STORAGE,
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CGS_UCODE_ID_MAXIMUM,
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};
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/**
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* struct cgs_firmware_info - Firmware information
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*/
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struct cgs_firmware_info {
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uint16_t version;
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uint16_t fw_version;
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uint16_t feature_version;
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uint32_t image_size;
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uint64_t mc_addr;
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/* only for smc firmware */
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uint32_t ucode_start_address;
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void *kptr;
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bool is_kicker;
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};
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typedef unsigned long cgs_handle_t;
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/**
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* cgs_read_register() - Read an MMIO register
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* @cgs_device: opaque device handle
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* @offset: register offset
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*
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* Return: register value
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*/
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typedef uint32_t (*cgs_read_register_t)(struct cgs_device *cgs_device, unsigned offset);
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/**
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* cgs_write_register() - Write an MMIO register
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* @cgs_device: opaque device handle
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* @offset: register offset
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* @value: register value
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*/
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typedef void (*cgs_write_register_t)(struct cgs_device *cgs_device, unsigned offset,
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uint32_t value);
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/**
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* cgs_read_ind_register() - Read an indirect register
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* @cgs_device: opaque device handle
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* @offset: register offset
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*
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* Return: register value
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*/
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typedef uint32_t (*cgs_read_ind_register_t)(struct cgs_device *cgs_device, enum cgs_ind_reg space,
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unsigned index);
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/**
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* cgs_write_ind_register() - Write an indirect register
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* @cgs_device: opaque device handle
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* @offset: register offset
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* @value: register value
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*/
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typedef void (*cgs_write_ind_register_t)(struct cgs_device *cgs_device, enum cgs_ind_reg space,
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unsigned index, uint32_t value);
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#define CGS_REG_FIELD_SHIFT(reg, field) reg##__##field##__SHIFT
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#define CGS_REG_FIELD_MASK(reg, field) reg##__##field##_MASK
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#define CGS_REG_SET_FIELD(orig_val, reg, field, field_val) \
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(((orig_val) & ~CGS_REG_FIELD_MASK(reg, field)) | \
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(CGS_REG_FIELD_MASK(reg, field) & ((field_val) << CGS_REG_FIELD_SHIFT(reg, field))))
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#define CGS_REG_GET_FIELD(value, reg, field) \
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(((value) & CGS_REG_FIELD_MASK(reg, field)) >> CGS_REG_FIELD_SHIFT(reg, field))
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#define CGS_WREG32_FIELD(device, reg, field, val) \
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cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))
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#define CGS_WREG32_FIELD_IND(device, space, reg, field, val) \
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cgs_write_ind_register(device, space, ix##reg, (cgs_read_ind_register(device, space, ix##reg) & ~CGS_REG_FIELD_MASK(reg, field)) | (val) << CGS_REG_FIELD_SHIFT(reg, field))
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typedef int (*cgs_get_firmware_info)(struct cgs_device *cgs_device,
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enum cgs_ucode_id type,
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struct cgs_firmware_info *info);
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struct cgs_ops {
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/* MMIO access */
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cgs_read_register_t read_register;
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cgs_write_register_t write_register;
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cgs_read_ind_register_t read_ind_register;
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cgs_write_ind_register_t write_ind_register;
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/* Firmware Info */
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cgs_get_firmware_info get_firmware_info;
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};
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struct cgs_os_ops; /* To be define in OS-specific CGS header */
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struct cgs_device
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{
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const struct cgs_ops *ops;
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/* to be embedded at the start of driver private structure */
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};
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/* Convenience macros that make CGS indirect function calls look like
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* normal function calls */
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#define CGS_CALL(func,dev,...) \
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(((struct cgs_device *)dev)->ops->func(dev, ##__VA_ARGS__))
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#define CGS_OS_CALL(func,dev,...) \
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(((struct cgs_device *)dev)->os_ops->func(dev, ##__VA_ARGS__))
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#define cgs_read_register(dev,offset) \
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CGS_CALL(read_register,dev,offset)
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#define cgs_write_register(dev,offset,value) \
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CGS_CALL(write_register,dev,offset,value)
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#define cgs_read_ind_register(dev,space,index) \
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CGS_CALL(read_ind_register,dev,space,index)
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#define cgs_write_ind_register(dev,space,index,value) \
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CGS_CALL(write_ind_register,dev,space,index,value)
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#define cgs_get_firmware_info(dev, type, info) \
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CGS_CALL(get_firmware_info, dev, type, info)
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#endif /* _CGS_COMMON_H */
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