626 lines
18 KiB
C
626 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* prepare to run common code
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*
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* Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
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*/
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#define DISABLE_BRANCH_PROFILING
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/* cpu_feature_enabled() cannot be used this early */
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#define USE_EARLY_PGTABLE_L5
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/percpu.h>
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#include <linux/start_kernel.h>
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#include <linux/io.h>
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#include <linux/memblock.h>
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#include <linux/cc_platform.h>
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#include <linux/pgtable.h>
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#include <asm/processor.h>
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#include <asm/proto.h>
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#include <asm/smp.h>
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#include <asm/setup.h>
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#include <asm/desc.h>
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#include <asm/tlbflush.h>
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#include <asm/sections.h>
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#include <asm/kdebug.h>
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#include <asm/e820/api.h>
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#include <asm/bios_ebda.h>
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#include <asm/bootparam_utils.h>
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#include <asm/microcode.h>
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#include <asm/kasan.h>
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#include <asm/fixmap.h>
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#include <asm/realmode.h>
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#include <asm/extable.h>
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#include <asm/trapnr.h>
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#include <asm/sev.h>
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/*
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* Manage page tables very early on.
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*/
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extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];
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static unsigned int __initdata next_early_pgt;
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pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX);
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#ifdef CONFIG_X86_5LEVEL
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unsigned int __pgtable_l5_enabled __ro_after_init;
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unsigned int pgdir_shift __ro_after_init = 39;
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EXPORT_SYMBOL(pgdir_shift);
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unsigned int ptrs_per_p4d __ro_after_init = 1;
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EXPORT_SYMBOL(ptrs_per_p4d);
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#endif
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#ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
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unsigned long page_offset_base __ro_after_init = __PAGE_OFFSET_BASE_L4;
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EXPORT_SYMBOL(page_offset_base);
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unsigned long vmalloc_base __ro_after_init = __VMALLOC_BASE_L4;
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EXPORT_SYMBOL(vmalloc_base);
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unsigned long vmemmap_base __ro_after_init = __VMEMMAP_BASE_L4;
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EXPORT_SYMBOL(vmemmap_base);
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#endif
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/*
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* GDT used on the boot CPU before switching to virtual addresses.
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*/
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static struct desc_struct startup_gdt[GDT_ENTRIES] = {
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[GDT_ENTRY_KERNEL32_CS] = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff),
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[GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff),
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[GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc093, 0, 0xfffff),
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};
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/*
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* Address needs to be set at runtime because it references the startup_gdt
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* while the kernel still uses a direct mapping.
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*/
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static struct desc_ptr startup_gdt_descr = {
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.size = sizeof(startup_gdt),
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.address = 0,
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};
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#define __head __section(".head.text")
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static void __head *fixup_pointer(void *ptr, unsigned long physaddr)
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{
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return ptr - (void *)_text + (void *)physaddr;
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}
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static unsigned long __head *fixup_long(void *ptr, unsigned long physaddr)
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{
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return fixup_pointer(ptr, physaddr);
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}
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#ifdef CONFIG_X86_5LEVEL
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static unsigned int __head *fixup_int(void *ptr, unsigned long physaddr)
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{
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return fixup_pointer(ptr, physaddr);
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}
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static bool __head check_la57_support(unsigned long physaddr)
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{
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/*
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* 5-level paging is detected and enabled at kernel decompression
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* stage. Only check if it has been enabled there.
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*/
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if (!(native_read_cr4() & X86_CR4_LA57))
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return false;
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*fixup_int(&__pgtable_l5_enabled, physaddr) = 1;
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*fixup_int(&pgdir_shift, physaddr) = 48;
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*fixup_int(&ptrs_per_p4d, physaddr) = 512;
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*fixup_long(&page_offset_base, physaddr) = __PAGE_OFFSET_BASE_L5;
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*fixup_long(&vmalloc_base, physaddr) = __VMALLOC_BASE_L5;
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*fixup_long(&vmemmap_base, physaddr) = __VMEMMAP_BASE_L5;
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return true;
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}
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#else
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static bool __head check_la57_support(unsigned long physaddr)
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{
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return false;
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}
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#endif
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static unsigned long __head sme_postprocess_startup(struct boot_params *bp, pmdval_t *pmd)
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{
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unsigned long vaddr, vaddr_end;
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int i;
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/* Encrypt the kernel and related (if SME is active) */
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sme_encrypt_kernel(bp);
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/*
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* Clear the memory encryption mask from the .bss..decrypted section.
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* The bss section will be memset to zero later in the initialization so
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* there is no need to zero it after changing the memory encryption
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* attribute.
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*/
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if (sme_get_me_mask()) {
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vaddr = (unsigned long)__start_bss_decrypted;
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vaddr_end = (unsigned long)__end_bss_decrypted;
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for (; vaddr < vaddr_end; vaddr += PMD_SIZE) {
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i = pmd_index(vaddr);
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pmd[i] -= sme_get_me_mask();
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}
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}
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/*
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* Return the SME encryption mask (if SME is active) to be used as a
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* modifier for the initial pgdir entry programmed into CR3.
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*/
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return sme_get_me_mask();
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}
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/* Code in __startup_64() can be relocated during execution, but the compiler
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* doesn't have to generate PC-relative relocations when accessing globals from
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* that function. Clang actually does not generate them, which leads to
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* boot-time crashes. To work around this problem, every global pointer must
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* be adjusted using fixup_pointer().
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*/
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unsigned long __head __startup_64(unsigned long physaddr,
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struct boot_params *bp)
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{
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unsigned long load_delta, *p;
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unsigned long pgtable_flags;
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pgdval_t *pgd;
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p4dval_t *p4d;
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pudval_t *pud;
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pmdval_t *pmd, pmd_entry;
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pteval_t *mask_ptr;
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bool la57;
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int i;
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unsigned int *next_pgt_ptr;
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la57 = check_la57_support(physaddr);
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/* Is the address too large? */
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if (physaddr >> MAX_PHYSMEM_BITS)
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for (;;);
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/*
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* Compute the delta between the address I am compiled to run at
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* and the address I am actually running at.
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*/
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load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map);
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/* Is the address not 2M aligned? */
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if (load_delta & ~PMD_PAGE_MASK)
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for (;;);
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/* Activate Secure Memory Encryption (SME) if supported and enabled */
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sme_enable(bp);
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/* Include the SME encryption mask in the fixup value */
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load_delta += sme_get_me_mask();
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/* Fixup the physical addresses in the page table */
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pgd = fixup_pointer(&early_top_pgt, physaddr);
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p = pgd + pgd_index(__START_KERNEL_map);
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if (la57)
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*p = (unsigned long)level4_kernel_pgt;
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else
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*p = (unsigned long)level3_kernel_pgt;
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*p += _PAGE_TABLE_NOENC - __START_KERNEL_map + load_delta;
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if (la57) {
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p4d = fixup_pointer(&level4_kernel_pgt, physaddr);
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p4d[511] += load_delta;
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}
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pud = fixup_pointer(&level3_kernel_pgt, physaddr);
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pud[510] += load_delta;
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pud[511] += load_delta;
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pmd = fixup_pointer(level2_fixmap_pgt, physaddr);
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for (i = FIXMAP_PMD_TOP; i > FIXMAP_PMD_TOP - FIXMAP_PMD_NUM; i--)
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pmd[i] += load_delta;
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/*
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* Set up the identity mapping for the switchover. These
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* entries should *NOT* have the global bit set! This also
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* creates a bunch of nonsense entries but that is fine --
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* it avoids problems around wraparound.
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*/
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next_pgt_ptr = fixup_pointer(&next_early_pgt, physaddr);
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pud = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
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pmd = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
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pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();
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if (la57) {
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p4d = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++],
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physaddr);
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i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
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pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;
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pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;
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i = physaddr >> P4D_SHIFT;
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p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
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p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
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} else {
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i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
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pgd[i + 0] = (pgdval_t)pud + pgtable_flags;
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pgd[i + 1] = (pgdval_t)pud + pgtable_flags;
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}
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i = physaddr >> PUD_SHIFT;
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pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
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pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
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pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL;
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/* Filter out unsupported __PAGE_KERNEL_* bits: */
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mask_ptr = fixup_pointer(&__supported_pte_mask, physaddr);
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pmd_entry &= *mask_ptr;
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pmd_entry += sme_get_me_mask();
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pmd_entry += physaddr;
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for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) {
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int idx = i + (physaddr >> PMD_SHIFT);
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pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE;
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}
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/*
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* Fixup the kernel text+data virtual addresses. Note that
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* we might write invalid pmds, when the kernel is relocated
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* cleanup_highmap() fixes this up along with the mappings
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* beyond _end.
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*
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* Only the region occupied by the kernel image has so far
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* been checked against the table of usable memory regions
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* provided by the firmware, so invalidate pages outside that
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* region. A page table entry that maps to a reserved area of
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* memory would allow processor speculation into that area,
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* and on some hardware (particularly the UV platform) even
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* speculative access to some reserved areas is caught as an
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* error, causing the BIOS to halt the system.
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*/
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pmd = fixup_pointer(level2_kernel_pgt, physaddr);
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/* invalidate pages before the kernel image */
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for (i = 0; i < pmd_index((unsigned long)_text); i++)
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pmd[i] &= ~_PAGE_PRESENT;
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/* fixup pages that are part of the kernel image */
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for (; i <= pmd_index((unsigned long)_end); i++)
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if (pmd[i] & _PAGE_PRESENT)
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pmd[i] += load_delta;
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/* invalidate pages after the kernel image */
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for (; i < PTRS_PER_PMD; i++)
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pmd[i] &= ~_PAGE_PRESENT;
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/*
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* Fixup phys_base - remove the memory encryption mask to obtain
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* the true physical address.
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*/
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*fixup_long(&phys_base, physaddr) += load_delta - sme_get_me_mask();
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return sme_postprocess_startup(bp, pmd);
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}
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unsigned long __startup_secondary_64(void)
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{
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/*
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* Return the SME encryption mask (if SME is active) to be used as a
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* modifier for the initial pgdir entry programmed into CR3.
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*/
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return sme_get_me_mask();
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}
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/* Wipe all early page tables except for the kernel symbol map */
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static void __init reset_early_page_tables(void)
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{
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memset(early_top_pgt, 0, sizeof(pgd_t)*(PTRS_PER_PGD-1));
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next_early_pgt = 0;
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write_cr3(__sme_pa_nodebug(early_top_pgt));
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}
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/* Create a new PMD entry */
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bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd)
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{
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unsigned long physaddr = address - __PAGE_OFFSET;
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pgdval_t pgd, *pgd_p;
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p4dval_t p4d, *p4d_p;
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pudval_t pud, *pud_p;
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pmdval_t *pmd_p;
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/* Invalid address or early pgt is done ? */
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if (physaddr >= MAXMEM || read_cr3_pa() != __pa_nodebug(early_top_pgt))
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return false;
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again:
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pgd_p = &early_top_pgt[pgd_index(address)].pgd;
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pgd = *pgd_p;
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/*
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* The use of __START_KERNEL_map rather than __PAGE_OFFSET here is
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* critical -- __PAGE_OFFSET would point us back into the dynamic
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* range and we might end up looping forever...
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*/
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if (!pgtable_l5_enabled())
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p4d_p = pgd_p;
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else if (pgd)
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p4d_p = (p4dval_t *)((pgd & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
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else {
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if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
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reset_early_page_tables();
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goto again;
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}
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p4d_p = (p4dval_t *)early_dynamic_pgts[next_early_pgt++];
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memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D);
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*pgd_p = (pgdval_t)p4d_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
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}
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p4d_p += p4d_index(address);
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p4d = *p4d_p;
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if (p4d)
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pud_p = (pudval_t *)((p4d & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
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else {
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if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
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reset_early_page_tables();
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goto again;
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}
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pud_p = (pudval_t *)early_dynamic_pgts[next_early_pgt++];
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memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
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*p4d_p = (p4dval_t)pud_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
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}
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pud_p += pud_index(address);
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pud = *pud_p;
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if (pud)
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pmd_p = (pmdval_t *)((pud & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
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else {
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if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
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reset_early_page_tables();
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goto again;
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}
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pmd_p = (pmdval_t *)early_dynamic_pgts[next_early_pgt++];
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memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD);
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*pud_p = (pudval_t)pmd_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
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}
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pmd_p[pmd_index(address)] = pmd;
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return true;
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}
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static bool __init early_make_pgtable(unsigned long address)
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{
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unsigned long physaddr = address - __PAGE_OFFSET;
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pmdval_t pmd;
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pmd = (physaddr & PMD_MASK) + early_pmd_flags;
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return __early_make_pgtable(address, pmd);
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}
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void __init do_early_exception(struct pt_regs *regs, int trapnr)
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{
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if (trapnr == X86_TRAP_PF &&
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early_make_pgtable(native_read_cr2()))
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return;
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if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT) &&
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trapnr == X86_TRAP_VC && handle_vc_boot_ghcb(regs))
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return;
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early_fixup_exception(regs, trapnr);
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}
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/* Don't add a printk in there. printk relies on the PDA which is not initialized
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yet. */
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static void __init clear_bss(void)
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{
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memset(__bss_start, 0,
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(unsigned long) __bss_stop - (unsigned long) __bss_start);
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}
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static unsigned long get_cmd_line_ptr(void)
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{
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unsigned long cmd_line_ptr = boot_params.hdr.cmd_line_ptr;
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cmd_line_ptr |= (u64)boot_params.ext_cmd_line_ptr << 32;
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return cmd_line_ptr;
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}
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static void __init copy_bootdata(char *real_mode_data)
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{
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char * command_line;
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unsigned long cmd_line_ptr;
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/*
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* If SME is active, this will create decrypted mappings of the
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* boot data in advance of the copy operations.
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*/
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sme_map_bootdata(real_mode_data);
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memcpy(&boot_params, real_mode_data, sizeof(boot_params));
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sanitize_boot_params(&boot_params);
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cmd_line_ptr = get_cmd_line_ptr();
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if (cmd_line_ptr) {
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command_line = __va(cmd_line_ptr);
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memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
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}
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/*
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* The old boot data is no longer needed and won't be reserved,
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* freeing up that memory for use by the system. If SME is active,
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* we need to remove the mappings that were created so that the
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* memory doesn't remain mapped as decrypted.
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*/
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sme_unmap_bootdata(real_mode_data);
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}
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asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
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{
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/*
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|
* Build-time sanity checks on the kernel image and module
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* area mappings. (these are purely build-time and produce no code)
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|
*/
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BUILD_BUG_ON(MODULES_VADDR < __START_KERNEL_map);
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BUILD_BUG_ON(MODULES_VADDR - __START_KERNEL_map < KERNEL_IMAGE_SIZE);
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|
BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);
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|
BUILD_BUG_ON((__START_KERNEL_map & ~PMD_MASK) != 0);
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|
BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0);
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|
BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
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|
MAYBE_BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
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|
(__START_KERNEL & PGDIR_MASK)));
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|
BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
|
|
|
|
cr4_init_shadow();
|
|
|
|
/* Kill off the identity-map trampoline */
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|
reset_early_page_tables();
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|
|
|
clear_bss();
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|
|
|
/*
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* This needs to happen *before* kasan_early_init() because latter maps stuff
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|
* into that page.
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|
*/
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|
clear_page(init_top_pgt);
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|
|
|
/*
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|
* SME support may update early_pmd_flags to include the memory
|
|
* encryption mask, so it needs to be called before anything
|
|
* that may generate a page fault.
|
|
*/
|
|
sme_early_init();
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|
|
|
kasan_early_init();
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|
|
|
/*
|
|
* Flush global TLB entries which could be left over from the trampoline page
|
|
* table.
|
|
*
|
|
* This needs to happen *after* kasan_early_init() as KASAN-enabled .configs
|
|
* instrument native_write_cr4() so KASAN must be initialized for that
|
|
* instrumentation to work.
|
|
*/
|
|
__native_tlb_flush_global(this_cpu_read(cpu_tlbstate.cr4));
|
|
|
|
idt_setup_early_handler();
|
|
|
|
copy_bootdata(__va(real_mode_data));
|
|
|
|
/*
|
|
* Load microcode early on BSP.
|
|
*/
|
|
load_ucode_bsp();
|
|
|
|
/* set init_top_pgt kernel high mapping*/
|
|
init_top_pgt[511] = early_top_pgt[511];
|
|
|
|
x86_64_start_reservations(real_mode_data);
|
|
}
|
|
|
|
void __init x86_64_start_reservations(char *real_mode_data)
|
|
{
|
|
/* version is always not zero if it is copied */
|
|
if (!boot_params.hdr.version)
|
|
copy_bootdata(__va(real_mode_data));
|
|
|
|
x86_early_init_platform_quirks();
|
|
|
|
switch (boot_params.hdr.hardware_subarch) {
|
|
case X86_SUBARCH_INTEL_MID:
|
|
x86_intel_mid_early_setup();
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
start_kernel();
|
|
}
|
|
|
|
/*
|
|
* Data structures and code used for IDT setup in head_64.S. The bringup-IDT is
|
|
* used until the idt_table takes over. On the boot CPU this happens in
|
|
* x86_64_start_kernel(), on secondary CPUs in start_secondary(). In both cases
|
|
* this happens in the functions called from head_64.S.
|
|
*
|
|
* The idt_table can't be used that early because all the code modifying it is
|
|
* in idt.c and can be instrumented by tracing or KASAN, which both don't work
|
|
* during early CPU bringup. Also the idt_table has the runtime vectors
|
|
* configured which require certain CPU state to be setup already (like TSS),
|
|
* which also hasn't happened yet in early CPU bringup.
|
|
*/
|
|
static gate_desc bringup_idt_table[NUM_EXCEPTION_VECTORS] __page_aligned_data;
|
|
|
|
static struct desc_ptr bringup_idt_descr = {
|
|
.size = (NUM_EXCEPTION_VECTORS * sizeof(gate_desc)) - 1,
|
|
.address = 0, /* Set at runtime */
|
|
};
|
|
|
|
static void set_bringup_idt_handler(gate_desc *idt, int n, void *handler)
|
|
{
|
|
#ifdef CONFIG_AMD_MEM_ENCRYPT
|
|
struct idt_data data;
|
|
gate_desc desc;
|
|
|
|
init_idt_data(&data, n, handler);
|
|
idt_init_desc(&desc, &data);
|
|
native_write_idt_entry(idt, n, &desc);
|
|
#endif
|
|
}
|
|
|
|
/* This runs while still in the direct mapping */
|
|
static void startup_64_load_idt(unsigned long physbase)
|
|
{
|
|
struct desc_ptr *desc = fixup_pointer(&bringup_idt_descr, physbase);
|
|
gate_desc *idt = fixup_pointer(bringup_idt_table, physbase);
|
|
|
|
|
|
if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) {
|
|
void *handler;
|
|
|
|
/* VMM Communication Exception */
|
|
handler = fixup_pointer(vc_no_ghcb, physbase);
|
|
set_bringup_idt_handler(idt, X86_TRAP_VC, handler);
|
|
}
|
|
|
|
desc->address = (unsigned long)idt;
|
|
native_load_idt(desc);
|
|
}
|
|
|
|
/* This is used when running on kernel addresses */
|
|
void early_setup_idt(void)
|
|
{
|
|
/* VMM Communication Exception */
|
|
if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
|
|
set_bringup_idt_handler(bringup_idt_table, X86_TRAP_VC, vc_boot_ghcb);
|
|
|
|
bringup_idt_descr.address = (unsigned long)bringup_idt_table;
|
|
native_load_idt(&bringup_idt_descr);
|
|
}
|
|
|
|
/*
|
|
* Setup boot CPU state needed before kernel switches to virtual addresses.
|
|
*/
|
|
void __head startup_64_setup_env(unsigned long physbase)
|
|
{
|
|
/* Load GDT */
|
|
startup_gdt_descr.address = (unsigned long)fixup_pointer(startup_gdt, physbase);
|
|
native_load_gdt(&startup_gdt_descr);
|
|
|
|
/* New GDT is live - reload data segment registers */
|
|
asm volatile("movl %%eax, %%ds\n"
|
|
"movl %%eax, %%ss\n"
|
|
"movl %%eax, %%es\n" : : "a"(__KERNEL_DS) : "memory");
|
|
|
|
startup_64_load_idt(physbase);
|
|
}
|