188 lines
4.9 KiB
C
188 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_TEXT_PATCHING_H
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#define _ASM_X86_TEXT_PATCHING_H
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#include <linux/types.h>
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#include <linux/stddef.h>
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#include <asm/ptrace.h>
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struct paravirt_patch_site;
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#ifdef CONFIG_PARAVIRT
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void apply_paravirt(struct paravirt_patch_site *start,
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struct paravirt_patch_site *end);
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#else
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static inline void apply_paravirt(struct paravirt_patch_site *start,
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struct paravirt_patch_site *end)
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{}
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#define __parainstructions NULL
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#define __parainstructions_end NULL
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#endif
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/*
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* Currently, the max observed size in the kernel code is
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* JUMP_LABEL_NOP_SIZE/RELATIVEJUMP_SIZE, which are 5.
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* Raise it if needed.
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*/
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#define POKE_MAX_OPCODE_SIZE 5
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extern void text_poke_early(void *addr, const void *opcode, size_t len);
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/*
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* Clear and restore the kernel write-protection flag on the local CPU.
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* Allows the kernel to edit read-only pages.
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* Side-effect: any interrupt handler running between save and restore will have
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* the ability to write to read-only pages.
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*
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* Warning:
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* Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
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* no thread can be preempted in the instructions being modified (no iret to an
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* invalid instruction possible) or if the instructions are changed from a
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* consistent state to another consistent state atomically.
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* On the local CPU you need to be protected against NMI or MCE handlers seeing
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* an inconsistent instruction while you patch.
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*/
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extern void *text_poke(void *addr, const void *opcode, size_t len);
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extern void text_poke_sync(void);
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extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
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extern void *text_poke_copy(void *addr, const void *opcode, size_t len);
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extern int poke_int3_handler(struct pt_regs *regs);
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extern void text_poke_bp(void *addr, const void *opcode, size_t len, const void *emulate);
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extern void text_poke_queue(void *addr, const void *opcode, size_t len, const void *emulate);
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extern void text_poke_finish(void);
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#define INT3_INSN_SIZE 1
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#define INT3_INSN_OPCODE 0xCC
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#define RET_INSN_SIZE 1
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#define RET_INSN_OPCODE 0xC3
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#define CALL_INSN_SIZE 5
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#define CALL_INSN_OPCODE 0xE8
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#define JMP32_INSN_SIZE 5
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#define JMP32_INSN_OPCODE 0xE9
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#define JMP8_INSN_SIZE 2
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#define JMP8_INSN_OPCODE 0xEB
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#define DISP32_SIZE 4
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static __always_inline int text_opcode_size(u8 opcode)
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{
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int size = 0;
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#define __CASE(insn) \
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case insn##_INSN_OPCODE: size = insn##_INSN_SIZE; break
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switch(opcode) {
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__CASE(INT3);
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__CASE(RET);
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__CASE(CALL);
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__CASE(JMP32);
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__CASE(JMP8);
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}
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#undef __CASE
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return size;
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}
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union text_poke_insn {
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u8 text[POKE_MAX_OPCODE_SIZE];
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struct {
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u8 opcode;
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s32 disp;
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} __attribute__((packed));
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};
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static __always_inline
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void __text_gen_insn(void *buf, u8 opcode, const void *addr, const void *dest, int size)
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{
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union text_poke_insn *insn = buf;
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BUG_ON(size < text_opcode_size(opcode));
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/*
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* Hide the addresses to avoid the compiler folding in constants when
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* referencing code, these can mess up annotations like
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* ANNOTATE_NOENDBR.
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*/
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OPTIMIZER_HIDE_VAR(insn);
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OPTIMIZER_HIDE_VAR(addr);
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OPTIMIZER_HIDE_VAR(dest);
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insn->opcode = opcode;
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if (size > 1) {
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insn->disp = (long)dest - (long)(addr + size);
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if (size == 2) {
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/*
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* Ensure that for JMP8 the displacement
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* actually fits the signed byte.
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*/
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BUG_ON((insn->disp >> 31) != (insn->disp >> 7));
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}
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}
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}
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static __always_inline
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void *text_gen_insn(u8 opcode, const void *addr, const void *dest)
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{
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static union text_poke_insn insn; /* per instance */
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__text_gen_insn(&insn, opcode, addr, dest, text_opcode_size(opcode));
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return &insn.text;
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}
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extern int after_bootmem;
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extern __ro_after_init struct mm_struct *poking_mm;
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extern __ro_after_init unsigned long poking_addr;
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#ifndef CONFIG_UML_X86
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static __always_inline
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void int3_emulate_jmp(struct pt_regs *regs, unsigned long ip)
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{
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regs->ip = ip;
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}
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static __always_inline
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void int3_emulate_push(struct pt_regs *regs, unsigned long val)
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{
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/*
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* The int3 handler in entry_64.S adds a gap between the
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* stack where the break point happened, and the saving of
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* pt_regs. We can extend the original stack because of
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* this gap. See the idtentry macro's create_gap option.
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*
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* Similarly entry_32.S will have a gap on the stack for (any) hardware
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* exception and pt_regs; see FIXUP_FRAME.
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*/
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regs->sp -= sizeof(unsigned long);
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*(unsigned long *)regs->sp = val;
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}
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static __always_inline
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unsigned long int3_emulate_pop(struct pt_regs *regs)
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{
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unsigned long val = *(unsigned long *)regs->sp;
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regs->sp += sizeof(unsigned long);
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return val;
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}
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static __always_inline
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void int3_emulate_call(struct pt_regs *regs, unsigned long func)
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{
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int3_emulate_push(regs, regs->ip - INT3_INSN_SIZE + CALL_INSN_SIZE);
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int3_emulate_jmp(regs, func);
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}
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static __always_inline
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void int3_emulate_ret(struct pt_regs *regs)
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{
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unsigned long ip = int3_emulate_pop(regs);
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int3_emulate_jmp(regs, ip);
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}
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#endif /* !CONFIG_UML_X86 */
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#endif /* _ASM_X86_TEXT_PATCHING_H */
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