76 lines
1.7 KiB
C
76 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* alternative runtime patching
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* inspired by the ARM64 and x86 version
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*
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* Copyright (C) 2021 Sifive.
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*/
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#include <linux/init.h>
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#include <linux/cpu.h>
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#include <linux/uaccess.h>
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#include <asm/alternative.h>
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#include <asm/sections.h>
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#include <asm/vendorid_list.h>
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#include <asm/sbi.h>
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#include <asm/csr.h>
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static struct cpu_manufacturer_info_t {
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unsigned long vendor_id;
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unsigned long arch_id;
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unsigned long imp_id;
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} cpu_mfr_info;
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static void (*vendor_patch_func)(struct alt_entry *begin, struct alt_entry *end,
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unsigned long archid,
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unsigned long impid) __initdata;
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static inline void __init riscv_fill_cpu_mfr_info(void)
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{
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#ifdef CONFIG_RISCV_M_MODE
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cpu_mfr_info.vendor_id = csr_read(CSR_MVENDORID);
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cpu_mfr_info.arch_id = csr_read(CSR_MARCHID);
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cpu_mfr_info.imp_id = csr_read(CSR_MIMPID);
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#else
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cpu_mfr_info.vendor_id = sbi_get_mvendorid();
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cpu_mfr_info.arch_id = sbi_get_marchid();
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cpu_mfr_info.imp_id = sbi_get_mimpid();
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#endif
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}
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static void __init init_alternative(void)
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{
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riscv_fill_cpu_mfr_info();
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switch (cpu_mfr_info.vendor_id) {
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#ifdef CONFIG_ERRATA_SIFIVE
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case SIFIVE_VENDOR_ID:
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vendor_patch_func = sifive_errata_patch_func;
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break;
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#endif
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default:
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vendor_patch_func = NULL;
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}
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}
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/*
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* This is called very early in the boot process (directly after we run
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* a feature detect on the boot CPU). No need to worry about other CPUs
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* here.
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*/
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void __init apply_boot_alternatives(void)
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{
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/* If called on non-boot cpu things could go wrong */
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WARN_ON(smp_processor_id() != 0);
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init_alternative();
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if (!vendor_patch_func)
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return;
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vendor_patch_func((struct alt_entry *)__alt_start,
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(struct alt_entry *)__alt_end,
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cpu_mfr_info.arch_id, cpu_mfr_info.imp_id);
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}
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