161 lines
2.6 KiB
Plaintext
161 lines
2.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* PPA8548 Device Tree Source (36-bit address map)
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* Copyright 2013 Prodrive B.V.
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*
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* Based on:
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* MPC8548 CDS Device Tree Source (36-bit address map)
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* Copyright 2012 Freescale Semiconductor Inc.
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*/
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/include/ "mpc8548si-pre.dtsi"
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/ {
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model = "ppa8548";
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compatible = "ppa8548";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&mpic>;
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memory {
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device_type = "memory";
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reg = <0 0 0x0 0x40000000>;
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};
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lbc: localbus@fe0005000 {
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reg = <0xf 0xe0005000 0 0x1000>;
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ranges = <0x0 0x0 0xf 0xff800000 0x00800000>;
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};
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soc: soc8548@fe0000000 {
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ranges = <0 0xf 0xe0000000 0x100000>;
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};
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pci0: pci@fe0008000 {
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/* ppa8548 board doesn't support PCI */
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status = "disabled";
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};
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pci1: pci@fe0009000 {
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/* ppa8548 board doesn't support PCI */
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status = "disabled";
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};
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pci2: pcie@fe000a000 {
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/* ppa8548 board doesn't support PCI */
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status = "disabled";
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};
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rio: rapidio@fe00c0000 {
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reg = <0xf 0xe00c0000 0x0 0x11000>;
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port1 {
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ranges = <0x0 0x0 0x0 0x80000000 0x0 0x40000000>;
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};
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};
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};
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&lbc {
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nor@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x00800000>;
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bank-width = <2>;
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device-width = <2>;
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partition@0 {
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reg = <0x0 0x7A0000>;
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label = "user";
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};
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partition@7A0000 {
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reg = <0x7A0000 0x20000>;
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label = "env";
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read-only;
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};
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partition@7C0000 {
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reg = <0x7C0000 0x40000>;
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label = "u-boot";
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read-only;
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};
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};
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};
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&soc {
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i2c@3000 {
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rtc@6f {
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compatible = "intersil,isl1208";
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reg = <0x6f>;
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};
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};
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i2c@3100 {
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};
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/*
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* Only ethernet controller @25000 and @26000 are used.
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* Use alias enet2 and enet3 for the remainig controllers,
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* to stay compatible with mpc8548si-pre.dtsi.
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*/
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enet2: ethernet@24000 {
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status = "disabled";
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};
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mdio@24520 {
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phy0: ethernet-phy@0 {
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interrupts = <7 1 0 0>;
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reg = <0x0>;
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};
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phy1: ethernet-phy@1 {
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interrupts = <8 1 0 0>;
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reg = <0x1>;
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};
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tbi0: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet0: ethernet@25000 {
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tbi-handle = <&tbi1>;
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phy-handle = <&phy0>;
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};
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mdio@25520 {
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tbi1: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet1: ethernet@26000 {
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tbi-handle = <&tbi2>;
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phy-handle = <&phy1>;
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};
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mdio@26520 {
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tbi2: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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enet3: ethernet@27000 {
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status = "disabled";
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};
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mdio@27520 {
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tbi3: tbi-phy@11 {
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reg = <0x11>;
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device_type = "tbi-phy";
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};
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};
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crypto@30000 {
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status = "disabled";
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};
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};
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/include/ "mpc8548si-post.dtsi"
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