286 lines
7.0 KiB
C
286 lines
7.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MTX-1 platform devices registration (Au1500)
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*
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* Copyright (C) 2007-2009, Florian Fainelli <florian@openwrt.org>
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/leds.h>
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#include <linux/gpio.h>
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#include <linux/gpio/machine.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <mtd/mtd-abi.h>
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#include <asm/bootinfo.h>
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#include <asm/reboot.h>
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#include <asm/setup.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/gpio-au1000.h>
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#include <asm/mach-au1x00/au1xxx_eth.h>
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#include <prom.h>
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const char *get_system_type(void)
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{
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return "MTX-1";
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}
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void prom_putchar(char c)
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{
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alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
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}
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static void mtx1_reset(char *c)
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{
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/* Jump to the reset vector */
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__asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
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}
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static void mtx1_power_off(void)
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{
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while (1)
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asm volatile (
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" .set mips32 \n"
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" wait \n"
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" .set mips0 \n");
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}
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void __init board_setup(void)
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{
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#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
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/* Enable USB power switch */
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alchemy_gpio_direction_output(204, 0);
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#endif /* IS_ENABLED(CONFIG_USB_OHCI_HCD) */
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/* Initialize sys_pinfunc */
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alchemy_wrsys(SYS_PF_NI2, AU1000_SYS_PINFUNC);
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/* Initialize GPIO */
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alchemy_wrsys(~0, AU1000_SYS_TRIOUTCLR);
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alchemy_gpio_direction_output(0, 0); /* Disable M66EN (PCI 66MHz) */
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alchemy_gpio_direction_output(3, 1); /* Disable PCI CLKRUN# */
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alchemy_gpio_direction_output(1, 1); /* Enable EXT_IO3 */
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alchemy_gpio_direction_output(5, 0); /* Disable eth PHY TX_ER */
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/* Enable LED and set it to green */
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alchemy_gpio_direction_output(211, 1); /* green on */
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alchemy_gpio_direction_output(212, 0); /* red off */
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pm_power_off = mtx1_power_off;
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_machine_halt = mtx1_power_off;
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_machine_restart = mtx1_reset;
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printk(KERN_INFO "4G Systems MTX-1 Board\n");
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}
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/******************************************************************************/
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static struct gpio_keys_button mtx1_gpio_button[] = {
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{
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.gpio = 207,
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.code = BTN_0,
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.desc = "System button",
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}
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};
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static struct gpio_keys_platform_data mtx1_buttons_data = {
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.buttons = mtx1_gpio_button,
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.nbuttons = ARRAY_SIZE(mtx1_gpio_button),
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};
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static struct platform_device mtx1_button = {
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.name = "gpio-keys",
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.id = -1,
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.dev = {
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.platform_data = &mtx1_buttons_data,
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}
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};
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static struct gpiod_lookup_table mtx1_wdt_gpio_table = {
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.dev_id = "mtx1-wdt.0",
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.table = {
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/* Global number 215 is offset 15 on Alchemy GPIO 2 */
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GPIO_LOOKUP("alchemy-gpio2", 15, NULL, GPIO_ACTIVE_HIGH),
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{ },
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},
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};
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static struct platform_device mtx1_wdt = {
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.name = "mtx1-wdt",
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.id = 0,
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};
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static const struct gpio_led default_leds[] = {
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{
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.name = "mtx1:green",
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.gpio = 211,
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}, {
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.name = "mtx1:red",
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.gpio = 212,
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},
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};
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static struct gpio_led_platform_data mtx1_led_data = {
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.num_leds = ARRAY_SIZE(default_leds),
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.leds = default_leds,
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};
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static struct platform_device mtx1_gpio_leds = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &mtx1_led_data,
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}
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};
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static struct mtd_partition mtx1_mtd_partitions[] = {
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{
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.name = "filesystem",
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.size = 0x01C00000,
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.offset = 0,
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},
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{
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.name = "yamon",
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.size = 0x00100000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "kernel",
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.size = 0x002c0000,
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.offset = MTDPART_OFS_APPEND,
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},
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{
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.name = "yamon env",
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.size = 0x00040000,
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.offset = MTDPART_OFS_APPEND,
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},
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};
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static struct physmap_flash_data mtx1_flash_data = {
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.width = 4,
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.nr_parts = 4,
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.parts = mtx1_mtd_partitions,
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};
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static struct resource mtx1_mtd_resource = {
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.start = 0x1e000000,
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.end = 0x1fffffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device mtx1_mtd = {
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.name = "physmap-flash",
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.dev = {
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.platform_data = &mtx1_flash_data,
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},
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.num_resources = 1,
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.resource = &mtx1_mtd_resource,
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};
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static struct resource alchemy_pci_host_res[] = {
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[0] = {
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.start = AU1500_PCI_PHYS_ADDR,
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.end = AU1500_PCI_PHYS_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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};
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static int mtx1_pci_idsel(unsigned int devsel, int assert)
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{
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/* This function is only necessary to support a proprietary Cardbus
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* adapter on the mtx-1 "singleboard" variant. It triggers a custom
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* logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
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*/
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udelay(1);
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if (assert && devsel != 0)
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/* Suppress signal to Cardbus */
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alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
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else
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alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */
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udelay(1);
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return 1;
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}
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static const char mtx1_irqtab[][5] = {
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[0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */
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[1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
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[2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */
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[3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
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[4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */
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[5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
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[6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */
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[7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
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};
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static int mtx1_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
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{
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return mtx1_irqtab[slot][pin];
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}
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static struct alchemy_pci_platdata mtx1_pci_pd = {
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.board_map_irq = mtx1_map_pci_irq,
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.board_pci_idsel = mtx1_pci_idsel,
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.pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
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PCI_CONFIG_CH |
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#if defined(__MIPSEB__)
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PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
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#else
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0,
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#endif
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};
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static struct platform_device mtx1_pci_host = {
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.dev.platform_data = &mtx1_pci_pd,
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.name = "alchemy-pci",
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.id = 0,
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.num_resources = ARRAY_SIZE(alchemy_pci_host_res),
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.resource = alchemy_pci_host_res,
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};
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static struct platform_device *mtx1_devs[] __initdata = {
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&mtx1_pci_host,
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&mtx1_gpio_leds,
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&mtx1_wdt,
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&mtx1_button,
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&mtx1_mtd,
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};
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static struct au1000_eth_platform_data mtx1_au1000_eth0_pdata = {
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.phy_search_highest_addr = 1,
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.phy1_search_mac0 = 1,
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};
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static int __init mtx1_register_devices(void)
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{
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int rc;
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irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
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irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
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au1xxx_override_eth_cfg(0, &mtx1_au1000_eth0_pdata);
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rc = gpio_request(mtx1_gpio_button[0].gpio,
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mtx1_gpio_button[0].desc);
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if (rc < 0) {
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printk(KERN_INFO "mtx1: failed to request %d\n",
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mtx1_gpio_button[0].gpio);
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goto out;
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}
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gpio_direction_input(mtx1_gpio_button[0].gpio);
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out:
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gpiod_add_lookup_table(&mtx1_wdt_gpio_table);
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return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs));
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}
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arch_initcall(mtx1_register_devices);
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