224 lines
6.1 KiB
C
224 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/m68knommu/kernel/setup.c
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*
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* Copyright (C) 1999-2007 Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 1998,1999 D. Jeff Dionne <jeff@uClinux.org>
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* Copyleft ()) 2000 James D. Schettine {james@telos-systems.com}
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* Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>
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* Copyright (C) 1995 Hamish Macdonald
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* Copyright (C) 2000 Lineo Inc. (www.lineo.com)
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* Copyright (C) 2001 Lineo, Inc. <www.lineo.com>
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*
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* 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca>
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*/
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/*
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* This file handles the architecture-dependent parts of system setup
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/fb.h>
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/console.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/memblock.h>
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#include <linux/seq_file.h>
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#include <linux/init.h>
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#include <linux/initrd.h>
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#include <linux/root_dev.h>
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#include <linux/rtc.h>
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#include <asm/setup.h>
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#include <asm/bootinfo.h>
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#include <asm/irq.h>
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#include <asm/machdep.h>
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#include <asm/sections.h>
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unsigned long memory_start;
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unsigned long memory_end;
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EXPORT_SYMBOL(memory_start);
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EXPORT_SYMBOL(memory_end);
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char __initdata command_line[COMMAND_LINE_SIZE];
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/* machine dependent timer functions */
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void (*mach_sched_init)(void) __initdata = NULL;
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/* machine dependent reboot functions */
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void (*mach_reset)(void);
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void (*mach_halt)(void);
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void (*mach_power_off)(void);
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#ifdef CONFIG_M68000
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#if defined(CONFIG_M68328)
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#define CPU_NAME "MC68328"
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#elif defined(CONFIG_M68EZ328)
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#define CPU_NAME "MC68EZ328"
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#elif defined(CONFIG_M68VZ328)
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#define CPU_NAME "MC68VZ328"
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#else
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#define CPU_NAME "MC68000"
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#endif
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#endif /* CONFIG_M68000 */
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#ifndef CPU_NAME
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#define CPU_NAME "UNKNOWN"
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#endif
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/*
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* Different cores have different instruction execution timings.
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* The old/traditional 68000 cores are basically all the same, at 16.
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* The ColdFire cores vary a little, their values are defined in their
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* headers. We default to the standard 68000 value here.
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*/
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#ifndef CPU_INSTR_PER_JIFFY
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#define CPU_INSTR_PER_JIFFY 16
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#endif
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void __init setup_arch(char **cmdline_p)
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{
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memory_start = PAGE_ALIGN(_ramstart);
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memory_end = _ramend;
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setup_initial_init_mm(_stext, _etext, _edata, NULL);
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config_BSP(&command_line[0], sizeof(command_line));
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#if defined(CONFIG_BOOTPARAM)
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strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
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command_line[sizeof(command_line) - 1] = 0;
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#endif /* CONFIG_BOOTPARAM */
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process_uboot_commandline(&command_line[0], sizeof(command_line));
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pr_info("uClinux with CPU " CPU_NAME "\n");
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#ifdef CONFIG_UCDIMM
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pr_info("uCdimm by Lineo, Inc. <www.lineo.com>\n");
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#endif
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#ifdef CONFIG_M68328
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pr_info("68328 support D. Jeff Dionne <jeff@uclinux.org>\n");
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pr_info("68328 support Kenneth Albanowski <kjahds@kjshds.com>\n");
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#endif
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#ifdef CONFIG_M68EZ328
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pr_info("68EZ328 DragonBallEZ support (C) 1999 Rt-Control, Inc\n");
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#endif
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#ifdef CONFIG_M68VZ328
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pr_info("M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n");
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pr_info("68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
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#endif
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#ifdef CONFIG_COLDFIRE
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pr_info("COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n");
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#ifdef CONFIG_M5307
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pr_info("Modified for M5307 by Dave Miller, dmiller@intellistor.com\n");
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#endif
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#ifdef CONFIG_ELITE
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pr_info("Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
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#endif
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#endif
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pr_info("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
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#if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )
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pr_info("68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n");
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pr_info("TRG SuperPilot FLASH card support <info@trgnet.com>\n");
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#endif
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#if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )
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pr_info("PalmV support by Lineo Inc. <jeff@uclinux.com>\n");
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#endif
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#ifdef CONFIG_DRAGEN2
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pr_info("DragonEngine II board support by Georges Menie\n");
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#endif
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#ifdef CONFIG_M5235EVB
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pr_info("Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
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#endif
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pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n",
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_stext, _etext, _sdata, _edata, __bss_start, __bss_stop);
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pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ",
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__bss_stop, memory_start, memory_start, memory_end);
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memblock_add(_rambase, memory_end - _rambase);
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memblock_reserve(_rambase, memory_start - _rambase);
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/* Keep a copy of command line */
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*cmdline_p = &command_line[0];
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memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
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boot_command_line[COMMAND_LINE_SIZE-1] = 0;
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/*
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* Give all the memory to the bootmap allocator, tell it to put the
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* boot mem_map at the start of memory.
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*/
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min_low_pfn = PFN_DOWN(memory_start);
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max_pfn = max_low_pfn = PFN_DOWN(memory_end);
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#if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
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if ((initrd_start > 0) && (initrd_start < initrd_end) &&
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(initrd_end < memory_end))
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memblock_reserve(initrd_start, initrd_end - initrd_start);
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#endif /* if defined(CONFIG_BLK_DEV_INITRD) */
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/*
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* Get kmalloc into gear.
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*/
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paging_init();
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}
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/*
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* Get CPU information for use by the procfs.
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*/
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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char *cpu, *mmu, *fpu;
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u_long clockfreq;
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cpu = CPU_NAME;
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mmu = "none";
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fpu = "none";
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clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
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seq_printf(m, "CPU:\t\t%s\n"
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"MMU:\t\t%s\n"
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"FPU:\t\t%s\n"
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"Clocking:\t%lu.%1luMHz\n"
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"BogoMips:\t%lu.%02lu\n"
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"Calibration:\t%lu loops\n",
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cpu, mmu, fpu,
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clockfreq / 1000000,
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(clockfreq / 100000) % 10,
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(loops_per_jiffy * HZ) / 500000,
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((loops_per_jiffy * HZ) / 5000) % 100,
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(loops_per_jiffy * HZ));
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo,
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};
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