331 lines
9.8 KiB
C
331 lines
9.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#ifndef __ARM_KVM_ASM_H__
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#define __ARM_KVM_ASM_H__
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#include <asm/hyp_image.h>
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#include <asm/insn.h>
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#include <asm/virt.h>
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#define ARM_EXIT_WITH_SERROR_BIT 31
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#define ARM_EXCEPTION_CODE(x) ((x) & ~(1U << ARM_EXIT_WITH_SERROR_BIT))
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#define ARM_EXCEPTION_IS_TRAP(x) (ARM_EXCEPTION_CODE((x)) == ARM_EXCEPTION_TRAP)
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#define ARM_SERROR_PENDING(x) !!((x) & (1U << ARM_EXIT_WITH_SERROR_BIT))
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#define ARM_EXCEPTION_IRQ 0
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#define ARM_EXCEPTION_EL1_SERROR 1
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#define ARM_EXCEPTION_TRAP 2
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#define ARM_EXCEPTION_IL 3
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/* The hyp-stub will return this for any kvm_call_hyp() call */
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#define ARM_EXCEPTION_HYP_GONE HVC_STUB_ERR
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#define kvm_arm_exception_type \
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{ARM_EXCEPTION_IRQ, "IRQ" }, \
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{ARM_EXCEPTION_EL1_SERROR, "SERROR" }, \
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{ARM_EXCEPTION_TRAP, "TRAP" }, \
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{ARM_EXCEPTION_HYP_GONE, "HYP_GONE" }
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/*
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* Size of the HYP vectors preamble. kvm_patch_vector_branch() generates code
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* that jumps over this.
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*/
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#define KVM_VECTOR_PREAMBLE (2 * AARCH64_INSN_SIZE)
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#define KVM_HOST_SMCCC_ID(id) \
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ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
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ARM_SMCCC_SMC_64, \
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ARM_SMCCC_OWNER_VENDOR_HYP, \
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(id))
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#define KVM_HOST_SMCCC_FUNC(name) KVM_HOST_SMCCC_ID(__KVM_HOST_SMCCC_FUNC_##name)
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#define __KVM_HOST_SMCCC_FUNC___kvm_hyp_init 0
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#ifndef __ASSEMBLY__
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#include <linux/mm.h>
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enum __kvm_host_smccc_func {
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/* Hypercalls available only prior to pKVM finalisation */
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/* __KVM_HOST_SMCCC_FUNC___kvm_hyp_init */
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__KVM_HOST_SMCCC_FUNC___kvm_get_mdcr_el2 = __KVM_HOST_SMCCC_FUNC___kvm_hyp_init + 1,
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__KVM_HOST_SMCCC_FUNC___pkvm_init,
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__KVM_HOST_SMCCC_FUNC___pkvm_create_private_mapping,
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__KVM_HOST_SMCCC_FUNC___pkvm_cpu_set_vector,
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__KVM_HOST_SMCCC_FUNC___kvm_enable_ssbs,
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__KVM_HOST_SMCCC_FUNC___vgic_v3_init_lrs,
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__KVM_HOST_SMCCC_FUNC___vgic_v3_get_gic_config,
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__KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize,
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/* Hypercalls available after pKVM finalisation */
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__KVM_HOST_SMCCC_FUNC___pkvm_host_share_hyp,
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__KVM_HOST_SMCCC_FUNC___pkvm_host_unshare_hyp,
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__KVM_HOST_SMCCC_FUNC___kvm_adjust_pc,
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__KVM_HOST_SMCCC_FUNC___kvm_vcpu_run,
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__KVM_HOST_SMCCC_FUNC___kvm_flush_vm_context,
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__KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_vmid_ipa,
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__KVM_HOST_SMCCC_FUNC___kvm_tlb_flush_vmid,
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__KVM_HOST_SMCCC_FUNC___kvm_flush_cpu_context,
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__KVM_HOST_SMCCC_FUNC___kvm_timer_set_cntvoff,
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__KVM_HOST_SMCCC_FUNC___vgic_v3_read_vmcr,
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__KVM_HOST_SMCCC_FUNC___vgic_v3_write_vmcr,
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__KVM_HOST_SMCCC_FUNC___vgic_v3_save_aprs,
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__KVM_HOST_SMCCC_FUNC___vgic_v3_restore_aprs,
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__KVM_HOST_SMCCC_FUNC___pkvm_vcpu_init_traps,
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};
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#define DECLARE_KVM_VHE_SYM(sym) extern char sym[]
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#define DECLARE_KVM_NVHE_SYM(sym) extern char kvm_nvhe_sym(sym)[]
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/*
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* Define a pair of symbols sharing the same name but one defined in
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* VHE and the other in nVHE hyp implementations.
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*/
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#define DECLARE_KVM_HYP_SYM(sym) \
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DECLARE_KVM_VHE_SYM(sym); \
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DECLARE_KVM_NVHE_SYM(sym)
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#define DECLARE_KVM_VHE_PER_CPU(type, sym) \
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DECLARE_PER_CPU(type, sym)
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#define DECLARE_KVM_NVHE_PER_CPU(type, sym) \
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DECLARE_PER_CPU(type, kvm_nvhe_sym(sym))
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#define DECLARE_KVM_HYP_PER_CPU(type, sym) \
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DECLARE_KVM_VHE_PER_CPU(type, sym); \
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DECLARE_KVM_NVHE_PER_CPU(type, sym)
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/*
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* Compute pointer to a symbol defined in nVHE percpu region.
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* Returns NULL if percpu memory has not been allocated yet.
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*/
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#define this_cpu_ptr_nvhe_sym(sym) per_cpu_ptr_nvhe_sym(sym, smp_processor_id())
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#define per_cpu_ptr_nvhe_sym(sym, cpu) \
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({ \
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unsigned long base, off; \
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base = kvm_arm_hyp_percpu_base[cpu]; \
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off = (unsigned long)&CHOOSE_NVHE_SYM(sym) - \
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(unsigned long)&CHOOSE_NVHE_SYM(__per_cpu_start); \
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base ? (typeof(CHOOSE_NVHE_SYM(sym))*)(base + off) : NULL; \
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})
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#if defined(__KVM_NVHE_HYPERVISOR__)
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#define CHOOSE_NVHE_SYM(sym) sym
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#define CHOOSE_HYP_SYM(sym) CHOOSE_NVHE_SYM(sym)
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/* The nVHE hypervisor shouldn't even try to access VHE symbols */
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extern void *__nvhe_undefined_symbol;
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#define CHOOSE_VHE_SYM(sym) __nvhe_undefined_symbol
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#define this_cpu_ptr_hyp_sym(sym) (&__nvhe_undefined_symbol)
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#define per_cpu_ptr_hyp_sym(sym, cpu) (&__nvhe_undefined_symbol)
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#elif defined(__KVM_VHE_HYPERVISOR__)
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#define CHOOSE_VHE_SYM(sym) sym
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#define CHOOSE_HYP_SYM(sym) CHOOSE_VHE_SYM(sym)
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/* The VHE hypervisor shouldn't even try to access nVHE symbols */
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extern void *__vhe_undefined_symbol;
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#define CHOOSE_NVHE_SYM(sym) __vhe_undefined_symbol
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#define this_cpu_ptr_hyp_sym(sym) (&__vhe_undefined_symbol)
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#define per_cpu_ptr_hyp_sym(sym, cpu) (&__vhe_undefined_symbol)
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#else
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/*
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* BIG FAT WARNINGS:
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*
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* - Don't be tempted to change the following is_kernel_in_hyp_mode()
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* to has_vhe(). has_vhe() is implemented as a *final* capability,
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* while this is used early at boot time, when the capabilities are
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* not final yet....
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*
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* - Don't let the nVHE hypervisor have access to this, as it will
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* pick the *wrong* symbol (yes, it runs at EL2...).
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*/
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#define CHOOSE_HYP_SYM(sym) (is_kernel_in_hyp_mode() \
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? CHOOSE_VHE_SYM(sym) \
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: CHOOSE_NVHE_SYM(sym))
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#define this_cpu_ptr_hyp_sym(sym) (is_kernel_in_hyp_mode() \
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? this_cpu_ptr(&sym) \
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: this_cpu_ptr_nvhe_sym(sym))
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#define per_cpu_ptr_hyp_sym(sym, cpu) (is_kernel_in_hyp_mode() \
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? per_cpu_ptr(&sym, cpu) \
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: per_cpu_ptr_nvhe_sym(sym, cpu))
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#define CHOOSE_VHE_SYM(sym) sym
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#define CHOOSE_NVHE_SYM(sym) kvm_nvhe_sym(sym)
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#endif
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struct kvm_nvhe_init_params {
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unsigned long mair_el2;
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unsigned long tcr_el2;
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unsigned long tpidr_el2;
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unsigned long stack_hyp_va;
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phys_addr_t pgd_pa;
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unsigned long hcr_el2;
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unsigned long vttbr;
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unsigned long vtcr;
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};
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/* Translate a kernel address @ptr into its equivalent linear mapping */
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#define kvm_ksym_ref(ptr) \
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({ \
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void *val = (ptr); \
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if (!is_kernel_in_hyp_mode()) \
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val = lm_alias((ptr)); \
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val; \
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})
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#define kvm_ksym_ref_nvhe(sym) kvm_ksym_ref(kvm_nvhe_sym(sym))
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struct kvm;
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struct kvm_vcpu;
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struct kvm_s2_mmu;
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DECLARE_KVM_NVHE_SYM(__kvm_hyp_init);
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DECLARE_KVM_HYP_SYM(__kvm_hyp_vector);
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#define __kvm_hyp_init CHOOSE_NVHE_SYM(__kvm_hyp_init)
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#define __kvm_hyp_vector CHOOSE_HYP_SYM(__kvm_hyp_vector)
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extern unsigned long kvm_arm_hyp_percpu_base[NR_CPUS];
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DECLARE_KVM_NVHE_SYM(__per_cpu_start);
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DECLARE_KVM_NVHE_SYM(__per_cpu_end);
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DECLARE_KVM_HYP_SYM(__bp_harden_hyp_vecs);
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#define __bp_harden_hyp_vecs CHOOSE_HYP_SYM(__bp_harden_hyp_vecs)
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extern void __kvm_flush_vm_context(void);
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extern void __kvm_flush_cpu_context(struct kvm_s2_mmu *mmu);
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extern void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, phys_addr_t ipa,
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int level);
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extern void __kvm_tlb_flush_vmid(struct kvm_s2_mmu *mmu);
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extern void __kvm_timer_set_cntvoff(u64 cntvoff);
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extern int __kvm_vcpu_run(struct kvm_vcpu *vcpu);
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extern void __kvm_adjust_pc(struct kvm_vcpu *vcpu);
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extern u64 __vgic_v3_get_gic_config(void);
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extern u64 __vgic_v3_read_vmcr(void);
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extern void __vgic_v3_write_vmcr(u32 vmcr);
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extern void __vgic_v3_init_lrs(void);
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extern u64 __kvm_get_mdcr_el2(void);
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#define __KVM_EXTABLE(from, to) \
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" .pushsection __kvm_ex_table, \"a\"\n" \
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" .align 3\n" \
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" .long (" #from " - .), (" #to " - .)\n" \
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" .popsection\n"
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#define __kvm_at(at_op, addr) \
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( { \
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int __kvm_at_err = 0; \
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u64 spsr, elr; \
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asm volatile( \
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" mrs %1, spsr_el2\n" \
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" mrs %2, elr_el2\n" \
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"1: at "at_op", %3\n" \
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" isb\n" \
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" b 9f\n" \
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"2: msr spsr_el2, %1\n" \
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" msr elr_el2, %2\n" \
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" mov %w0, %4\n" \
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"9:\n" \
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__KVM_EXTABLE(1b, 2b) \
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: "+r" (__kvm_at_err), "=&r" (spsr), "=&r" (elr) \
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: "r" (addr), "i" (-EFAULT)); \
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__kvm_at_err; \
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} )
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#else /* __ASSEMBLY__ */
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.macro get_host_ctxt reg, tmp
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adr_this_cpu \reg, kvm_host_data, \tmp
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add \reg, \reg, #HOST_DATA_CONTEXT
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.endm
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.macro get_vcpu_ptr vcpu, ctxt
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get_host_ctxt \ctxt, \vcpu
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ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
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.endm
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.macro get_loaded_vcpu vcpu, ctxt
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adr_this_cpu \ctxt, kvm_hyp_ctxt, \vcpu
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ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
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.endm
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.macro set_loaded_vcpu vcpu, ctxt, tmp
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adr_this_cpu \ctxt, kvm_hyp_ctxt, \tmp
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str \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
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.endm
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/*
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* KVM extable for unexpected exceptions.
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* Create a struct kvm_exception_table_entry output to a section that can be
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* mapped by EL2. The table is not sorted.
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*
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* The caller must ensure:
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* x18 has the hypervisor value to allow any Shadow-Call-Stack instrumented
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* code to write to it, and that SPSR_EL2 and ELR_EL2 are restored by the fixup.
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*/
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.macro _kvm_extable, from, to
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.pushsection __kvm_ex_table, "a"
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.align 3
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.long (\from - .), (\to - .)
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.popsection
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.endm
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#define CPU_XREG_OFFSET(x) (CPU_USER_PT_REGS + 8*x)
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#define CPU_LR_OFFSET CPU_XREG_OFFSET(30)
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#define CPU_SP_EL0_OFFSET (CPU_LR_OFFSET + 8)
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/*
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* We treat x18 as callee-saved as the host may use it as a platform
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* register (e.g. for shadow call stack).
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*/
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.macro save_callee_saved_regs ctxt
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str x18, [\ctxt, #CPU_XREG_OFFSET(18)]
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stp x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)]
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stp x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)]
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stp x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)]
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stp x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)]
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stp x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)]
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stp x29, lr, [\ctxt, #CPU_XREG_OFFSET(29)]
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.endm
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.macro restore_callee_saved_regs ctxt
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// We require \ctxt is not x18-x28
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ldr x18, [\ctxt, #CPU_XREG_OFFSET(18)]
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ldp x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)]
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ldp x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)]
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ldp x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)]
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ldp x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)]
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ldp x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)]
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ldp x29, lr, [\ctxt, #CPU_XREG_OFFSET(29)]
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.endm
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.macro save_sp_el0 ctxt, tmp
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mrs \tmp, sp_el0
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str \tmp, [\ctxt, #CPU_SP_EL0_OFFSET]
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.endm
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.macro restore_sp_el0 ctxt, tmp
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ldr \tmp, [\ctxt, #CPU_SP_EL0_OFFSET]
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msr sp_el0, \tmp
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.endm
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#endif
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#endif /* __ARM_KVM_ASM_H__ */
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